System and method for improving detection and capture of a host system catastrophic failure

1. A method for improving detection and capture of a catastrophic failure, the method comprising:

intercepting, by a hardware application processor, a hang sensitive transaction that is to be performed by a bootstrap processor, wherein the bootstrap processor is configured to store data associated with the hang sensitive transaction in a random access memory prior to executing the hang sensitive transaction;

initiating a timeout counter based on a threshold that is based on a maximum processing duration of the hang sensitive transaction;

in response to detecting that the hang sensitive transaction has finished execution, stopping the timeout counter; and

in response to the timeout counter reaching the threshold:

retrieving the data associated with the hang sensitive transaction from the random access memory; and

storing the retrieved data to a non-volatile storage.

2. The method of claim 1 , wherein the random access memory is shared by the bootstrap processor and the hardware application processor.

3. The method of claim 1 , deleting the data associated with the hang sensitive transaction in the random access memory subsequent to the storing the data to the non-volatile storage.

4. The method of claim 1 , further comprising prior to executing the hang sensitive transaction, waking the hardware application processor, wherein the hardware application processor is configured to save forensic data upon the catastrophic failure of the hang sensitive transaction.

5. The method of claim 1 , wherein the hang sensitive transaction includes one of an input/output access, a memory mapped input/output access, a peripheral component interconnect-express access, and a unified extensible firmware interface callback function.

6. The method of claim 1 , wherein the non-volatile storage includes one of a complementary metal-oxide-semiconductor, a basic input/output non-volatile storage, an embedded controller non-volatile storage.

7. The method of claim 1 , further comprising, in response to a successful execution of the hang sensitive transaction, putting the hardware application processor to sleep.

8. The method of claim 1 , wherein the reaching the threshold is associated with the catastrophic failure of the hang sensitive transaction.

9. An information handling system, comprising:

a memory device communicatively coupled to a boot processor and an application processor in the information handling system;

the boot processor configured to execute a hang sensitive transaction, wherein the boot processor is communicatively coupled to the application processor, and wherein the hang sensitive transaction includes an input/output access, a peripheral component interconnect-express access, a memory mapped input/output access, and a callback function;

prior to the execution of the hang sensitive transaction, the boot processor storing information associated with the hang sensitive transaction at the memory device; and

the application processor configured to:

monitor the information handling system to detect a catastrophic failure of the hang sensitive transaction; and

in response to the detection of the catastrophic failure, to retrieve the information stored in the memory device and to store the retrieved information in a non-volatile storage device.

10. The information handling system of claim 9 , further comprising determining whether the information is stored in a complementary metal-oxide-semiconductor before determining whether the information is stored in a basic input/output non-volatile memory device.

11. The information handling system of claim 9 , further comprising deleting the information associated with the hang sensitive transaction from the memory device.

12. The information handling system of claim 9 , wherein the application processor is configured to initiate a watchdog timer to be used in the detection of the catastrophic failure of the hang sensitive transaction, wherein the watchdog timer is based on a maximum execution time of the hang sensitive transaction.

13. The information handling system of claim 9 , wherein the memory device communicatively coupled to the application processor and the boot processor includes a complementary metal-oxide-semiconductor, a basic input/output non-volatile memory device, and an embedded controller non-volatile memory device.

14. A method for saving forensic data after a catastrophic failure of an advanced configuration and power interface event executed by a bootstrap processor in an information handling system, the method comprising:

in response to an occurrence of a system management interrupt, retrieving the forensic data from a shared memory and storing the forensic data in a non-volatile memory storage device, wherein the shared memory is allocated by the bootstrap processor as a platform communication channel, and wherein the forensic data was stored in the shared memory by the bootstrap processor prior to the execution of the advanced configuration and the power interface event.

15. The method of claim 14 , wherein a watchdog timer reaching a predetermined threshold is an indication of a system hang event occurring during the execution of the advanced configuration and the power interface event.

16. The method of claim 15 , wherein the predetermined threshold is a maximum processing time of the advanced configuration and the power interface event.

17. The method of claim 15 , further comprising subsequent to the occurrence of the system management interrupt, disabling the watchdog timer.

18. The method of claim 15 , further comprising subsequent to the occurrence of the system management interrupt, restarting the watchdog timer.

19. The method of claim 14 , further comprising:

determining whether one of a basic input output system non-volatile memory or an embedded controller non-volatile memory is available;

in response to the determining that one of the basic input output system non-volatile memory and the embedded controller non-volatile memory is available, storing information associated with the advanced configuration and the power interface event in the available non-volatile memory; and

in response to the determining that both the basic input output system non-volatile memory and the embedded controller non-volatile memory are not available, storing the information associated with the advanced configuration and the power interface event in a complementary metal-oxide-semiconductor.