IP Library Granted Patent US 11,574,252
Granted Patent B2
US 11,574,252 · App. 16/795,439 · Granted Feb 7, 2023

System and method for prioritizing and ranking static analysis results using machine learning

Inventor: Andrew R. Calvano (Draper, UT)
Assignee: Raytheon Company
G06N20/10G06F17/18G06K9/6256
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Quick Facts
Patent No.
US 11,574,252
App. No.
16/795,439
Granted
Feb 7, 2023
Kind
B2
Abstract

A method includes obtaining at least one program slice embedding vector and at least one register vector that are generated based on results from a static analysis tool, the at least one register vector corresponding to the at least one program slice embedding vector. The method also includes using a machine learning model to generate, from the at least one program slice embedding vector and the at least one register vector, at least one probability rating associated with a vulnerability. The method also includes reporting the at least one probability rating for use by the static analysis tool.

Claims (47)

1. A method comprising:

obtaining at least one program slice embedding vector and at least one register vector that are generated based on results from a static analysis tool, the at least one register vector corresponding to the at least one program slice embedding vector;

using a machine learning model to generate, from the at least one program slice embedding vector and the at least one register vector, at least one probability rating associated with a vulnerability; and

reporting the at least one probability rating for use by the static analysis tool.

2. The method of claim 1 , wherein:

the results from the static analysis tool are generated based on analysis of a binary by the static analysis tool; and

the at least one probability rating indicates a probability of the vulnerability existing in the binary.

3. The method of claim 2 , wherein each of the at least one program slice embedding vector is generated from a program slice representing portions of the binary that correspond to the vulnerability.

4. The method of claim 2 , wherein each of the at least one register vector indicates a CPU register that corresponds to the vulnerability.

5. The method of claim 1 , wherein:

the at least one probability rating comprises multiple probability ratings, and

the method further comprises ranking or aggregating the multiple probability ratings.

6. The method of claim 1 , wherein the machine learning model is trained in an iterative process using training data comprising a plurality of program slice embedding vectors, a plurality of register vectors, and a plurality of labels.

7. The method of claim 6 , wherein:

each of the plurality of register vectors in the training data indicates a CPU register; and

each of the plurality of labels in the training data identifies a register type of a corresponding one of the plurality of register vectors.

8. A system comprising:

at least one memory configured to store instructions; and

at least one processor coupled to the at least one memory and configured when executing the instructions to:

obtain at least one program slice embedding vector and at least one register vector that are generated based on results from a static analysis tool, the at least one register vector corresponding to the at least one program slice embedding vector;

use a machine learning model to generate, from the at least one program slice embedding vector and the at least one register vector, at least one probability rating associated with a vulnerability; and

report the at least one probability rating for use by the static analysis tool.

9. The system of claim 8 , wherein:

the results from the static analysis tool are generated based on analysis of a binary by the static analysis tool; and

the at least one probability rating indicates a probability of the vulnerability existing in the binary.

10. The system of claim 9 , wherein each of the at least one program slice embedding vector is generated from a program slice representing portions of the binary that correspond to the vulnerability.

11. The system of claim 9 , wherein each of the at least one register vector indicates a CPU register that corresponds to the vulnerability.

12. The system of claim 8 , wherein:

the at least one probability rating comprises multiple probability ratings, and

the at least one processor is further configured to rank or aggregate the multiple probability ratings.

13. The system of claim 8 , wherein the machine learning model is trained in an iterative process using training data comprising a plurality of program slice embedding vectors, a plurality of register vectors, and a plurality of labels.

14. The system of claim 13 , wherein:

each of the plurality of register vectors in the training data indicates a CPU register; and

each of the plurality of labels in the training data identifies a register type of a corresponding one of the plurality of register vectors.

15. A non-transitory computer readable medium containing instructions that when executed cause at least one processor to:

obtain at least one program slice embedding vector and at least one register vector that are generated based on results from a static analysis tool, the at least one register vector corresponding to the at least one program slice embedding vector;

use a machine learning model to generate, from the at least one program slice embedding vector and the at least one register vector, at least one probability rating associated with a vulnerability; and

report the at least one probability rating for use by the static analysis tool.

16. The non-transitory computer readable medium of claim 15 , wherein:

the results from the static analysis tool are generated based on analysis of a binary by the static analysis tool; and

the at least one probability rating indicates a probability of the vulnerability existing in the binary.

17. The non-transitory computer readable medium of claim 16 , wherein each of the at least one program slice embedding vector is generated from a program slice representing portions of the binary that correspond to the vulnerability.

18. The non-transitory computer readable medium of claim 16 , wherein each of the at least one register vector indicates a CPU register that corresponds to the vulnerability.

19. The non-transitory computer readable medium of claim 15 , wherein:

the at least one probability rating comprises multiple probability ratings, and

the instructions further cause the at least one processor to rank or aggregate the multiple probability ratings.

20. The non-transitory computer readable medium of claim 15 , wherein the machine learning model is trained in an iterative process using training data comprising a plurality of program slice embedding vectors, a plurality of register vectors, and a plurality of labels.

Assignments (4)
CHANGE OF NAME Recorded Jul 3, 2024
From: COLUMBUS BUYER LLC
To: NIGHTWING GROUP, LLC
Reel/Frame 068106/0251 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2024
From: RAYTHEON COMPANY
To: COLUMBUS BUYER LLC
Reel/Frame 068233/0420 →
SECURITY INTEREST Recorded Apr 1, 2024
From: COLUMBUS BUYER LLC; RAYTHEON BLACKBIRD TECHNOLOGIES, INC.; RAYTHEON FOREGROUND SECURITY, INC.
To: WELLS FARGO BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 066960/0411 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 19, 2020
From: CALVANO, ANDREW R.
To: RAYTHEON COMPANY
Reel/Frame 051864/0463 →