IP Library Granted Patent US 11,204,839
Granted Patent B2
US 11,204,839 · App. 16/796,783 · Granted Dec 21, 2021

Memory system with low-latency read recovery and method of operating the memory system

Inventors: Chenrong Xiong (San Jose, CA); Fan Zhang (Fremont, CA); Haobo Wang (Sunnyvale, CA); Xuanxuan Lu (San Jose, CA); Meysam Asadi (San Jose, CA)
Assignee: SK hynix Inc.
G06F11/1415G06F2201/85
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Quick Facts
Patent No.
US 11,204,839
App. No.
16/796,783
Granted
Dec 21, 2021
Kind
B2
Abstract

Multiple memory systems with respective decoders employ a low latency implementation of a read recovery level feature in decoding data. The decoding comprises receiving from a host a read request for decoding read data at a first recovery level by a first memory system, a first decoder of the first memory system being set at a second recovery level with a corresponding maximum iteration number when the read request is received by the first memory system; and operating the first decoder, after a set time elapses, to decode the read data at the second recovery level. A second decoder of a second memory system is set at the first recovery level for at least part of the time during which the first decoder operates to decode the read data at the second recovery level.

Claims (31)

1. A system comprising:

first and second memory systems storing first and second copies of data, respectively, and having first and second decoders, respectively, each of the first and second memory systems being configured to execute read commands received from a host, each read command being associated with one or more of a plurality of recovery levels, each of which directs decoding at a specific latency and decoding strength,

wherein, when the first memory system receives, from the host, a read command for decoding the first copy of data at a first recovery level, the first decoder decodes the first copy of data at the first recovery level for a first time slot and sets a second time slot associated with a second recovery level, the second time slot longer than the first time slot;

when the second memory system receives, from the host, a read command for decoding the second copy of data at the first recovery level in response to a decoding fail of the first decoder at the first recovery level, the second decoder decodes the second copy of data at the first recovery level for the first time slot; and

when the first memory system receives, from the host, a read command for decoding the first copy of data at the second recovery level in response to a decoding fail of the second decoder at the first recovery level, the first decoder decodes the first copy of data at the second recovery level for a third time slot, which is determined based on the first and second time slots and is shorter than the second time slot.

2. The system of claim 1 , wherein the third time slot is determined by subtracting two first time slots from the second time slot.

3. The system of claim 2 , wherein, when the first time slot elapses, the first decoder issues to the first memory system a notice indicating failure of decoding at the first recovery level at a number of iterations corresponding to a maximum number of iterations for the first recovery level, which is less the maximum number of iterations for the second recovery level.

4. The system of claim 3 , wherein the first decoder continues decoding at the second recovery level until the first copy of data is successfully decoded or the maximum number of iterations for the second recovery level is reached.

5. The system of claim 4 , wherein the first memory system reports the notice indicating failure to the host.

6. The system of claim 1 , wherein the first recovery level has a lower latency than the second recovery level.

7. The system of claim 1 , wherein the first recovery level has a lower decoding strength than the second recovery level.

8. The system of claim 1 , wherein the first recovery level is a fast fail mode and the second recovery level is a default mode.

9. The system of claim 1 , wherein each of the first and second memory systems is a solid state drive (SSD).

10. A method for decoding in first and second memory systems storing first and second copies of data, respectively, and having first and second decoders, respectively, the method comprising:

receiving, by the first memory system, from the host, a read command for decoding the first copy of data at a first recovery level;

decoding, by the first decoder, the first copy of data at the first recovery level for a first time slot and setting a second time slot associated with a second recovery level, the second time slot longer than the first time slot;

receiving, by the second memory system, from the host, a read command for decoding the second copy of data at the first recovery level in response to a decoding fail of the first decoder at the first recovery level;

decoding, by the second decoder, the second copy of data at the first recovery level for the first time slot;

receiving, by the first memory system, from the host, a read command for decoding the first copy of data at the second recovery level in response to a decoding fail of the second decoder at the first recovery level; and

decoding, by the first decoder, the first copy of data at the second recovery level for a third time slot, which is determined based on the first and second time slots and is shorter than the second time slot.

11. The method of claim 10 , wherein the third time slot is determined by subtracting two first time slots from the second time slot.

12. The method of claim 11 , further comprising:

issuing, by the first decoder to the first memory system, when the first time slot elapses, a notice indicating failure of decoding at the first recovery level at a number of iterations corresponding to a maximum number of iterations for the first recovery level, which is less the maximum number of iterations for the second recovery level.

13. The method of claim 12 , further comprising:

continuing decoding, by the first decoder, at the second recovery level until the first copy of data is successfully decoded or the maximum number of iterations for the second recovery level is reached.

14. The method of claim 13 , further comprising:

reporting, by the first memory system, the notice indicating failure to the host.

15. The method of claim 10 , wherein the first recovery level has a lower latency than the second recovery level.

16. The method of claim 10 , wherein the first recovery level has a lower decoding strength than the second recovery level.

17. The method of claim 10 , wherein the first recovery level is a fast fail mode and the second recovery level is a default mode.

18. The method of claim 10 , wherein each of the first and second memory systems is a solid state drive (SSD).

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2021
From: XIONG, CHENRONG; WANG, HAOBO; LU, XUANXUAN; ASADI, MEYSAM
To: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
Reel/Frame 057565/0481 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2021
From: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
To: SK HYNIX INC.
Reel/Frame 056883/0151 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2020
From: ZHANG, FAN
To: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
Reel/Frame 051882/0227 →
Continuity (1)
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