IP Library Granted Patent US 11,055,813
Granted Patent B2
US 11,055,813 · App. 16/799,104 · Granted Jul 6, 2021

Method, electronic device and computer program product for expanding memory of GPU

Inventors: Fucai Liu (Beijing, CN); Anzhou Hou (Shanghai, CN); Zhen Jia (Shanghai, CN); Chenxi Hu (Beijing, CN)
Assignee: EMC IP Holding Company LLC
G06T1/60G06F9/5016G06F12/0888G06F12/10G06F13/16G06T1/20G06T15/005
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Quick Facts
Patent No.
US 11,055,813
App. No.
16/799,104
Granted
Jul 6, 2021
Kind
B2
Abstract

Techniques are disclosed for expanding a memory of a graphics processing unit. For example, a method comprises: receiving, from a graphics processing unit coupled to a host, an indication that data to be accessed by the graphics processing unit is absent in the memory of the graphics processing unit, where the data is stored in a storage device coupled to the host; in response to receiving the indication, determining, from a plurality of candidate paths, a path for migrating the data from the storage device to the memory of the graphics processing unit; causing the data to be migrated from the storage device to the memory of the graphics processing unit via the determined path; and instructing the graphics processing unit to access the data from the memory of the graphics processing unit. As such, a memory of a GPU can be expanded with an external storage device.

Claims (72)

1. A method of expanding a memory implemented within a graphics processing unit comprising:

receiving, from a graphics processing unit coupled to a host, an indication that data to be accessed by the graphics processing unit is absent in a memory implemented within the graphics processing unit, the data being stored in a storage device coupled to the host;

in response to receiving the indication, determining, from a plurality of candidate paths, a path for migrating the data from the storage device to the memory implemented within the graphics processing unit;

causing the data to be migrated from the storage device to the memory implemented within the graphics processing unit via the determined path; and

instructing the graphics processing unit to access the data from the memory ef implemented within the graphics processing unit;

wherein the plurality of candidate paths comprises a first candidate path and a second candidate path, the first candidate path indicating a data migration between the storage device and the memory implemented within the graphics processing unit via a cache implemented within the host, and the second candidate path indicating a direct data migration between the storage device and the memory implemented within the graphics processing unit.

2. The method of claim 1 , wherein determining the path comprises:

in response to determining that the data is read-only data or write-only data, determining the second candidate path as the path.

3. The method of claim 1 , wherein determining the path comprises:

in response to determining that the data is read-write data, determining the first candidate path as the path.

4. The method of claim 1 , wherein causing the data to be migrated from the storage device to the memory implemented within the graphics processing unit via the determined path comprises:

in response to the first candidate path being determined as the path,

determining, in the cache, a page address corresponding to a virtual address of the data to be accessed by the graphics processing unit, wherein the data in the storage device is to be cached in the page address;

determining, from the memory implemented within the graphics processing unit, a storage block for storing the data; and

causing the data to be migrated from the page address in the cache to the storage block.

5. The method of claim 4 , wherein the memory implemented within the graphics processing unit comprises a plurality of storage blocks and determining the storage block comprises:

in response to determining that an unused storage block is present in the plurality of storage blocks, determining the unused storage block as the storage block for storing the data.

6. The method of claim 4 , wherein the memory implemented within the graphics processing unit comprises a plurality of storage blocks, and determining the storage block comprises:

in response to determining that an unused storage block is absent in the plurality of storage blocks, causing data in a used storage block of the plurality of storage blocks to be migrated to the cache; and

determining the used storage block as the storage block for storing the data.

7. The method of claim 4 , wherein causing the data to be migrated from the page address in the cache to the storage block comprises:

causing the graphics processing unit to migrate the data from the page address in the cache to the storage block via Direct Memory Access (DMA).

8. The method of claim 1 , wherein causing the data to be migrated from the storage device to the memory implemented within the graphics processing unit via the determined path comprises:

in response to the second candidate path being determined as the path,

determining, from the memory implemented within the graphics processing unit, a storage block for storing the data;

determining, based on the storage block, a destination address to which the data is to be migrated; and

indicating the destination address to the storage device so that the storage device migrates the data to the destination address.

9. The method of claim 8 , wherein indicating the destination address to the storage device comprises:

allocating a buffer from a memory of the host;

storing the destination address in the buffer; and

sending a direct I/O request to a driver of the storage device based on the buffer, such that the driver, in response to receiving the direct I/O request, extracts the destination address from the buffer and sends an I/O command generated based on the destination address to the storage device.

10. The method of claim 8 , wherein the storage device migrates the data to the destination address via Direct Memory Access (DMA).

11. The method of claim 1 , wherein the storage device comprises a solid-state disk supporting Non-Volatile Memory Express (NVMe).

12. The method of claim 1 , wherein the graphics processing unit and the storage device are coupled to the host via Peripheral Component Interconnect Express (PCI-e) interfaces respectively.

13. An electronic device, comprising:

at least one processing unit;

at least one memory coupled to the at least one processing unit and storing instructions for execution by the at least one processing unit, the instructions, when executed by the at least one processing unit, causing the device to perform acts comprising:

receiving, from a graphics processing unit coupled to a host, an indication that data to be accessed by the graphics processing unit is absent in the memory implemented within the graphics processing unit, the data being stored in a storage device coupled to the host;

in response to receiving the indication, determining, from a plurality of candidate paths, a path for migrating the data from the storage device to the memory implemented within the graphics processing unit;

causing the data to be migrated from the storage device to the memory implemented within the graphics processing unit via the determined path; and

instructing the graphics processing unit to access the data from the memory implemented within the graphics processing unit;

wherein the plurality of candidate paths comprises a first candidate path and a second candidate path, the first candidate path indicating a data migration between the storage device and the memory implemented within the graphics processing unit via a cache implemented within the host, and the second candidate path indicating a direct data migration between the storage device and the memory implemented within the graphics processing unit.

14. The device of claim 13 , wherein determining the path comprises:

in response to determining that the data is read-only data or write-only data, determining the second candidate path as the path.

15. The device of claim 13 , wherein determining the path comprises:

in response to determining that the data is read-write data, determining the first candidate path as the path.

16. The device of claim 13 , wherein causing the data to be migrated from the storage device to the memory implemented within the graphics processing unit via the determined path comprises:

in response to the first candidate path being determined as the path,

determining, in the cache, a page address corresponding to a virtual address of the data to be accessed by the graphics processing unit, wherein the data in the storage device is to be cached in the page address;

determining, from the memory implemented within the graphics processing unit, a storage block for storing the data in; and

causing the data to be migrated from the page address in the cache to the storage block.

17. The device of claim 13 , wherein causing the data to be migrated from the storage device to the memory implemented within the graphics processing unit via the determined path comprises:

in response to the second candidate path being determined as the path,

determining, from the memory implemented within the graphics processing unit, a storage block for storing the data;

determining, based on the storage block, a destination address to which the data is to be migrated; and

indicating the destination address to the storage device so that the storage device migrates the data to the destination address.

18. A computer program product being tangibly stored on a non-transitory computer-readable medium and comprising machine-executable instructions which, when executed by a device, cause the device to perform steps of:

receiving, from a graphics processing unit coupled to a host, an indication that data to be accessed by the graphics processing unit is absent in a memory implemented within the graphics processing unit, the data being stored in a storage device coupled to the host;

in response to receiving the indication, determining, from a plurality of candidate paths, a path for migrating the data from the storage device to the memory implemented within the graphics processing unit;

causing the data to be migrated from the storage device to the memory implemented within the graphics processing unit via the determined path; and

instructing the graphics processing unit to access the data from the memory implemented within the graphics processing unit;

wherein the plurality of candidate paths comprises a first candidate path and a second candidate path, the first candidate path indicating a data migration between the storage device and the memory implemented within the graphics processing unit via a cache implemented within the host, and the second candidate path indicating a direct data migration between the storage device and the memory implemented within the graphics processing unit.

19. The computer program product of claim 18 , wherein causing the data to be migrated from the storage device to the memory implemented within the graphics processing unit via the determined path comprises:

in response to the first candidate path being determined as the path,

determining, in the cache, a page address corresponding to a virtual address of the data to be accessed by the graphics processing unit, wherein the data in the storage device is to be cached in the page address;

determining, from the memory implemented within the graphics processing unit, a storage block for storing the data; and

causing the data to be migrated from the page address in the cache to the storage block.

20. The computer program product of claim 18 , wherein causing the data to be migrated from the storage device to the memory implemented within the graphics processing unit via the determined path comprises:

in response to the second candidate path being determined as the path,

determining, from the memory implemented within the graphics processing unit, a storage block for storing the data;

determining, based on the storage block, a destination address to which the data is to be migrated; and

indicating the destination address to the storage device so that the storage device migrates the data to the destination address.

Assignments (13)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052851/0081) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0441 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052851/0917) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0509 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052852/0022) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0582 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053311/0169) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060438/0742 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052771 FRAME 0906 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0298 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC; THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052851/0081 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052851/0917 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052852/0022 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 053311/0169 →
SECURITY AGREEMENT Recorded May 28, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 052771/0906 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2020
From: LIU, FUCAI; HOU, ANZHOU; JIA, ZHEN; HU, CHENXI
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 051905/0647 →