Complementary metal-oxide-semiconductor device and method of manufacturing the same

1. A complementary metal-oxide-semiconductor device, comprising:

a p-type field effect transistor having a first transistor architecture, the first transistor architecture comprising:

fin bases and semiconductor fins, each of the semiconductor fins being disposed on and continuously connected to one of the fin bases; and

a first source/drain region, extending along a sidewall of each of the semiconductor fins and a top of each of e semiconductor ns that is connected to the sidewall;

an n-type field effect transistor coupled with the p-type field effect transistor and having a second transistor architecture, the second transistor architecture comprising:

a nanosheet base and nanosheets stacked over the nanosheet base; and

a second source/drain region, disposed on the nanosheet base and surrounding each of the nanosheets, the first source/drain region and the second source/drain region being spatially separated from each other; and

a gate structure, covering the first transistor architecture and the second transistor architecture, wherein in a cross-sectional view, a top surface of a topmost one of the nanosheets is covered by the gate structure and the second source/drain region that laterally surrounds a bottom of the gate structure.

2. The complementary metal-oxide-semiconductor device of claim 1 , wherein the first transistor architecture further comprises a first source/drain contact disposed on the first source/drain region, and the first source/drain region is interposed between the first source/drain contact and a sidewall of an outermost one of the semiconductor fins.

3. The complementary metal-oxide-semiconductor device of claim 1 , wherein the p-type field effect transistor includes a first semiconductor structure and the n-type field effect transistor includes a second semiconductor structure different from the first semiconductor structure,

the gate structure mostly contacts the first semiconductor structure along a (110) crystallographic surface, and

the gate structure mostly contacts the second semiconductor structure along a (100) crystallographic surface.

4. The complementary metal-oxide-semiconductor device of claim 3 , wherein the first semiconductor structure and the second semiconductor structure include a material selected from Si, Ge, SiGe, or a combination thereof.

5. The complementary metal-oxide-semiconductor device of claim 1 , wherein the second transistor architecture further comprises a second source/drain contact disposed on the second source/drain region and overlapping the nanosheets.

6. The complementary metal-oxide-semiconductor device of claim 1 , wherein in the cross-sectional view, a bottom surface of the topmost one of the nanosheets is in contact with a gate dielectric layer and the second source/drain region that laterally surrounds the gate dielectric layer.

7. The complementary metal-oxide-semiconductor device of claim 1 , wherein the gate structure horizontally extends over a semiconductor substrate from the p-type field effect transistor to the n-type field effect transistor.

8. A complementary metal-oxide-semiconductor device, comprising:

a semiconductor substrate;

semiconductor fins, disposed over the semiconductor substrate and extending parallel with respect to each other in a first direction;

nanosheets, stacked over the semiconductor substrate and extending in the first direction;

a nanosheet base, disposed on the semiconductor substrate, the nanosheets being interposed between the nanosheet base and the semiconductor fins;

a first source/drain region, wrapping around each of the semiconductor fins in a first cross-sectional view;

a second source/drain region, disposed below the first source/drain region and wrapping around each of the nanosheets in the first cross-sectional view; and

a gate structure, extending along a second direction perpendicular to the first direction and contacting the semiconductor fins and the nanosheets,

wherein a contact area between the gate structure and the semiconductor fins extends mostly along the first direction and a third direction perpendicular to the first direction and the second direction, and a contact area between the gate structure and the nanosheets extends mostly along the first direction and the second direction.

9. The complementary metal-oxide-semiconductor device of claim 8 , wherein a width of a first semiconductor fin of the semiconductor fins in the second direction is smaller than a width of a first nanosheet of the nanosheets in the second direction, and a height of the first semiconductor fin in the third direction is greater than a height of the first nanosheet in the third direction.

10. The complementary metal-oxide-semiconductor device of claim 8 , wherein a width of an upper straight portion of the nanosheet base in the second direction is equal to a width of a first nanosheet of the nanosheets in the second direction, and a height of the first semiconductor fin in the third direction is greater than a height of the first nanosheet in the third direction.

11. The complementary metal-oxide-semiconductor device of claim 8 , wherein in a second cross-sectional view, the gate structure wraps around each of the nanosheets and each of the semiconductor fins.

12. The complementary metal-oxide-semiconductor device of claim 8 , further comprising:

a source/drain contact, surrounding the first source/drain region and the second region, filling a space between the first source/drain region and the second region, and extending to be interposed between the nanosheet base and the second region in the first cross-sectional view.

13. The complementary metal-oxide-semiconductor device of claim 8 , wherein a metal plug is disposed adjacent to and spaced apart from the nanosheet base in the first cross-sectional view.

14. The complementary metal-oxide-semiconductor device of claim 8 , further comprising:

a source and drain contact disposed adjacent to the gate structure;

isolation structures disposed on the semiconductor substrate; and

a metal plug buried in the isolation structures and physically contacting the source and drain contact.

15. A complementary metal-oxide-semiconductor device, comprising:

fin bases, protruding from a semiconductor substrate;

semiconductor fins, continuously connected to the fin bases and extending parallel with respect to each other in a first direction;

nanosheets, stacked upon one another and disposed above the semiconductor fins;

a common source/drain region, wrapping around each of the nanosheets and extending to cover each of the semiconductor fins in a first cross-sectional view; and

a gate structure, elongated along a second direction and extending along a third direction to surround each of the nanosheets and each of the semiconductor fins in a second cross-sectional view, wherein the first direction is substantially perpendicular to the second direction and the third direction.

16. The complementary metal-oxide-semiconductor device of claim 15 , further comprising:

a common source/drain contact, surrounding the common source/drain region in the first cross-sectional view.

17. The complementary metal-oxide-semiconductor device of claim 15 , further comprising:

a metal plug, disposed adjacent to the fin bases and vertically between the semiconductor substrate and the gate structure in the second cross-sectional view.

18. The complementary metal-oxide-semiconductor device of claim 17 , further comprising:

a lower source/drain region, disposed over the semiconductor substrate; and

a lower source/drain contact, coupling the lower source/drain region to the metal plug in a third-cross sectional view.

19. The complementary metal-oxide-semiconductor device of claim 18 , further comprising:

an upper source/drain region, vertically disposed over the lower source/drain region; and

an upper source/drain contact, surrounding the upper source/drain region and physically separated from the lower source/drain contact in the third-cross sectional view.

20. The complementary metal-oxide-semiconductor device of claim 15 , wherein a width of a first semiconductor fin of the semiconductor fins in the second direction is equal to a width of a first nanosheet of the nanosheets in the second direction.