IP Library Granted Patent US 11,532,940
Granted Patent B2
US 11,532,940 · App. 16/801,299 · Granted Dec 20, 2022

Communication in a converter device

Inventors: Daniel Hallmans (Ludvika, SE); Jimmy Ohman (Ludvika, SE); Johan Österberg (Borlänge, SE); Joakim Tolfmans (Falun, SE)
Assignee: HITACHI ENERGY SWITZERLAND AG
H02J3/40H02M7/483H02M7/4835H02M7/797H04B10/27
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Quick Facts
Patent No.
US 11,532,940
App. No.
16/801,299
Granted
Dec 20, 2022
Kind
B2
Abstract

A method can be used to synchronize time between nodes of a converter device for high voltage power conversion. The method is performed in a first node of the converter device and includes receiving a time reference from a second node of the converter device, obtaining a delay value for receiving time references from the second node, determining a compensated time by adding the delay value to the time reference, and setting a clock in the first node to be the compensated time.

Claims (32)

1. A method for synchronizing time between a plurality of nodes of a converter device for high voltage power conversion, the method being performed in a first node of the converter device and comprising:

receiving a time reference from a second node of the converter device;

obtaining a delay value for receiving time references from the second node;

determining a compensated time by adding the delay value to the time reference; and

setting a clock in the first node to be the compensated time.

2. The method according to claim 1 , further comprising sending the compensated time as a time reference to a third node of the converter device.

3. The method according to claim 1 , wherein the delay value considers both a communication delay and a processing delay.

4. The method according to claim 1 , wherein a plurality of time references in the converter device is based on a master clock source.

5. The method according to claim 4 , wherein all time references in the converter device are based on the master clock source.

6. A computer readable medium storing computer program code which, when run on the first node causes the first node to perform the method of claim 1 .

7. A first node for synchronizing time between a plurality of nodes of a converter device for high voltage power conversion, the first node being one of the plurality of nodes, the first node comprising:

a processor; and

a non-transitory memory storing instructions that, when executed by the processor, cause the first node to:

receive a time reference from a second node of the plurality of nodes;

obtain a delay value for receiving time references from the second node;

determine a compensated time by adding the delay value to the time reference; and

set a clock in the first node to be the compensated time.

8. The first node according to claim 7 , wherein the instructions further cause the first node to send the compensated time as a time reference to a third node of the plurality of nodes.

9. The first node according to claim 7 , wherein the delay value considers both a communication delay and a processing delay.

10. The first node according to claim 7 , wherein a plurality of time references in the converter device are based on a master clock source.

11. The first node according to claim 10 , wherein all time references in the converter device are based on the master clock source.

12. A method for synchronizing time between a plurality of nodes of a converter device for high voltage power conversions:

receiving, by a first node, a first time reference from a second node of the converter device;

obtaining, by the first node, a first delay value for receiving time references from the second node;

determining, by the first node, a first compensated time by adding the first delay value to the first time reference;

setting a clock in the first node to be the first compensated time;

sending the first compensated time as a second time reference to a third node of the converter device;

receiving, by the third node, the second time reference from the first node of the converter device;

obtaining, by the third node, a second delay value for receiving time references from the third node;

determining, by the third node, a second compensated time by adding the second delay value to the second time reference;

setting a clock in the third node to be the second compensated time; and

sending the second compensated time as a time reference to a fourth node of the converter device.

Assignments (3)
MERGER Recorded Nov 13, 2023
From: HITACHI ENERGY SWITZERLAND AG
To: HITACHI ENERGY LTD
Reel/Frame 065548/0905 →
CHANGE OF NAME Recorded Dec 31, 2021
From: ABB POWER GRIDS SWITZERLAND AG
To: HITACHI ENERGY SWITZERLAND AG
Reel/Frame 058601/0692 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2020
From: HALLMANS, DANIEL; ÖHMAN, JIMMY; ÖSTERBERG, JOHAN; TOLFMANS, JOAKIM
To: ABB POWER GRIDS SWITZERLAND AG
Reel/Frame 052652/0905 →