MIMO radar with receive antenna multiplexing

1. A multi-antenna signal decoding method, comprising:

producing a first reference signal by modulating a first copy of an oscillation signal with a first coding pattern, using a first modulator;

producing one or more second reference signals by modulating, using one or more second modulators, one or more second copies of the oscillation signal with one or more second coding patterns orthogonal to the first coding pattern;

receiving a first antenna signal and the first reference signal at a first mixer;

producing, using the first mixer, a first down-converted signal based on the first antenna signal and the first reference signal;

receiving, at one or more second mixers, one or more second antenna signals and the one or more second reference signals;

producing, using the one or more second mixers, one or more second down-converted signals based on the one or more second antenna signals and the one or more second reference signals;

converting, using an analog-to-digital converter, a summation signal corresponding to a sum of the first down-converted signal and the one or more second down-converted signals, into a digital receive-signal; and

extracting, at a processor, a plurality of digital signals from the digital receive-signal, wherein each of the plurality of digital signals corresponds to one of the first antenna signal and the one or more second antenna signals.

2. The multi-antenna signal decoding method of claim 1 , wherein the oscillation signal is a differential signal.

3. The multi-antenna signal decoding method of claim 1 , wherein the first modulator comprises a first phase modulator, and at least one of the one or more second modulators comprise a second phase modulator.

4. The multi-antenna signal decoding method of claim 3 , wherein the first phase modulator and the second phase modulator are binary phase-shift keying modulators.

5. The multi-antenna signal decoding method of claim 1 , wherein the first coding pattern and the one or more second coding patterns comprise six-bit, sixty-four phase coding patterns.

6. The multi-antenna signal decoding method of claim 1 , further comprising:

producing the summation signal by summing the first down-converted signal and the one or more second down-converted signals, using a summation circuit; and

minimizing aliasing in the summation signal using an anti-aliasing filter.

7. A multi-antenna digital beamforming transceiver, comprising:

a first modulator configured to produce a first reference signal by modulating a first copy of an oscillation signal with a first coding pattern;

one or more second modulators, the one or more second modulators configured to produce one or more second reference signals by modulating one or more second copies of the oscillation signal with one or more second coding patterns orthogonal to the first coding pattern;

a first mixer configured to receive a first antenna signal and the first reference signal, and produce a first down-converted signal based on the first antenna signal and the first reference signal;

one or more second mixers, the one or more second mixers configured to receive one or more second antenna signals and the one or more second reference signals, and produce one or more second down-converted signals based on the one or more second antenna signals and the one or more second reference signals;

an analog-to-digital converter configured to convert a summation signal corresponding to a sum of the first down-converted signal and the one or more second down-converted signals, into a digital receive-signal; and

a processor coupled to the analog-to-digital converter and configured to extract a plurality of digital signals from the digital receive-signal, wherein each of the plurality of digital signals corresponds to one of the first antenna signal and the one or more second antenna signals, before or after additional signal processing operations are applied.

8. The multi-antenna digital beamforming transceiver of claim 7 , wherein the oscillation signal is a differential signal.

9. The multi-antenna digital beamforming transceiver of claim 7 , wherein the first modulator comprises a first phase modulator, and each one of the one or more second modulators comprises a second phase modulator.

10. The multi-antenna digital beamforming transceiver of claim 9 , wherein the first phase modulator and the second phase modulator are binary phase-shift keying modulators.

11. The multi-antenna digital beamforming transceiver of claim 7 , wherein the first coding pattern and the one or more second coding patterns comprise six-bit, sixty-four phase coding patterns.

12. The multi-antenna digital beamforming transceiver of claim 7 , wherein the processor is a digital signal processor.

13. The multi-antenna digital beamforming transceiver of claim 7 , further comprising:

a summation circuit configured to produce the summation signal by summing the first down-converted signal and the one or more second down-converted signals; and

an anti-aliasing filter coupling the summation circuit to the analog-to-digital converter and configured to minimize aliasing in the summation signal.

14. The multi-antenna digital beamforming transceiver of claim 7 , wherein the multi-antenna digital beamforming transceiver resides on a single chip.

15. A non-transitory computer readable medium storing instructions executable by a processor, the instructions comprising instructions to:

produce a first reference signal by modulating a first copy of an oscillation signal with a first coding pattern, using a first modulator;

produce one or more second reference signals by modulating one or more second copies of the oscillation signal with one or more second coding patterns orthogonal to the first coding pattern, using one or more second modulators;

receive, using a first mixer, a first antenna signal and the first reference signal;

produce, using the first mixer, a first down-converted signal based on the first antenna signal and the first reference signal;

receive, using one or more second mixers, one or more second antenna signals and the one or more second reference signals;

produce, using the one or more second mixers, one or more second down-converted signals based on the one or more second antenna signals and the one or more second reference signals;

receive, at the processor, a digital receive-signal from an analog-to-digital converter, the digital receive-signal corresponding to a sum of the first down-converted signal and the one or more second down-converted signals, into a digital receive-signal; and

extract a plurality of digital signals from the digital receive-signal, wherein each of the plurality of digital signals corresponds to one of the first antenna signal and the one or more second antenna signal.

16. The non-transitory computer readable medium claim 15 , wherein the first coding pattern and the one or more second coding patterns comprise six-bit, sixty-four phase coding patterns.

17. The non-transitory computer readable medium of claim 15 ,

wherein the instructions further comprise instructions to:

produce, using a summation circuit, the digital receive-signal by summing the first down-converted signal and the one or more second down-converted signals; and

minimize, using an anti-aliasing filter, aliasing in the digital receive-signal.