IP Library Granted Patent US 11,036,248
Granted Patent B1
US 11,036,248 · App. 16/806,246 · Granted Jun 15, 2021

Method of forming a semiconductor device and circuit

Inventor: Martin Podzemny (Lesna, CZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
G05F1/575G05F1/10G05F1/46G05G1/56
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,036,248
App. No.
16/806,246
Granted
Jun 15, 2021
Kind
B1
Abstract

A voltage regulator circuit may include a first loop that forms a reference signal that substantially does not vary in response to the output voltage, the reference circuit may also be configured to form a control signal that is representative of changes in the reference signal. The voltage regulator circuit may also include a second loop configured to form a value of a control electrode of an output transistor according to the control signal and wherein the output circuit is configured to change a value of the control electrode according to a difference between the output voltage and the reference signal.

Claims (24)

1. A voltage circuit to form an output voltage for a load, the voltage circuit comprising:

a control circuit configured to form a reference voltage wherein the control circuit does not receive a signal that is representative of either of the output voltage or an output current supplied to the load by the voltage circuit;

an output transistor that conducts the output current and forms the output voltage;

a transconductance amplifier that forms an output signal that varies in response to a difference between the output voltage and the reference voltage; and

an output circuit having a resistor coupled in series between the control circuit and the output transistor to form a first voltage for a gate voltage for the output transistor, wherein the resistor also receives the output signal and changes the first voltage according to the output signal.

2. The voltage circuit of claim 1 wherein the transconductance amplifier receives a first signal that is representative of the output voltage and receives a second signal that is representative of the reference voltage and responsively forms the output signal.

3. The voltage circuit of claim 1 wherein the transconductance amplifier has an inverting input coupled to receive the output voltage and a non-inverting input coupled to receive the reference voltage.

4. The voltage circuit of claim 1 wherein the output transistor has a drain coupled to receive an input voltage, a source coupled to supply the output current to the load, and a gate coupled to receive the gate voltage from the output circuit.

5. The voltage circuit of claim 1 wherein the resistor has a first terminal coupled to receive a control voltage from the control circuit, the resistor having a second terminal that receives a signal representative of the output signal.

6. The voltage circuit of claim 5 wherein the output circuit includes a first buffer that is coupled to the second terminal of the resistor and applies the gate voltage to the output transistor.

7. The voltage circuit of claim 6 wherein the output circuit includes a second buffer that receives the control voltage from the control circuit and applies a representative signal to the first terminal of the resistor.

8. The voltage circuit of claim 6 wherein the output circuit includes a second buffer that receives the control voltage from the control circuit and has an output coupled to the first terminal of the resistor, the second terminal of the resistor commonly coupled to an input of the first buffer and to receive the output signal from the transconductance amplifier.

9. The voltage circuit of claim 8 wherein control circuit includes an operational amplifier that forms the control voltage that controls a value of the reference voltage and wherein the second buffer has an input coupled to an output of the operational amplifier to receive the control voltage.

10. The voltage circuit of claim 1 further including a frequency compensation capacitor coupled to an output of the transconductance amplifier.

11. A semiconductor device having a regulator circuit for forming an output voltage, the regulator circuit comprising:

a reference circuit configured to form a reference signal that substantially does not vary in response to the output voltage, the reference circuit including an operational amplifier configured to form a control signal that is representative of changes in the reference signal, the reference circuit including a transistor wherein the reference circuit controls a gate voltage of the transistor according to the control signal;

an output transistor configured to conduct an output current to a load and to control the output voltage; and

an output circuit configured to form an adjust signal that is representative of a difference between the output voltage and the reference signal, the output circuit configured to form a value of a control electrode of the output transistor responsively to the control signal and the adjust signal.

12. The semiconductor device of claim 11 wherein the output circuit includes a transconductance amplifier coupled to form the adjust signal according to the difference between the output voltage and the reference signal.

13. The semiconductor device of claim 11 wherein the reference circuit does not receive a signal that is representative of the output voltage or the output current.

14. The semiconductor device of claim 11 wherein the regulator circuit and the load are formed as semiconductor devices on a single semiconductor substrate.

15. A semiconductor device having a regulator circuit for forming an output voltage, the regulator circuit comprising:

a reference circuit configured to form a reference signal that substantially does not vary in response to the output voltage, the reference circuit also configured to form a control signal that is representative of changes in the reference signal wherein the control signal substantially does not vary in response to the output voltage; and

an output circuit configured to form an adjust signal that is representative of a difference between the output voltage and the reference signal, the output circuit configured change a value of the control signal according to a value of the adjust signal, the output circuit configured to control the output voltage responsively to the value of the control signal.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 052656, FRAME 0842 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064080/0149 →
SECURITY INTEREST Recorded May 13, 2020
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 052656/0842 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2020
From: PODZEMNY, MARTIN
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 051979/0311 →
Cited By (1)
US 12,449,831