IP Library Granted Patent US 10,942,886
Granted Patent B2
US 10,942,886 · App. 16/808,283 · Granted Mar 9, 2021

Data transmission method and data transmission system

Inventors: Alan Kobayashi (Los Altos, CA); Sujan Valiyaka Thomas (Pleasanton, CA); Ramakrishna Chilukuri (San Jose, CA); Rahul Kumar Agarwal (Saratoga, CA); Iyothsna Nagaraja (San Jose, CA)
Assignee: Kinetic Technologies
G06F13/42H03M13/1515
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Quick Facts
Patent No.
US 10,942,886
App. No.
16/808,283
Granted
Mar 9, 2021
Kind
B2
Abstract

A data transmission method and system for enhanced channel coding efficiency of a DisplayPort interface is disclosed. One method comprises transmitting a plurality of coding units for each micro-packet in each of one or more lanes of a DisplayPort Main Link from a DisplayPort transmitter, wherein each of the coding units comprises: a group of m symbol chunks, each symbol chunk including four 8-bit symbols, wherein m is 2 or 4; and an n-bit code data indicator that precedes the group of m-symbol chunks, wherein n is 2 or 4, and wherein the n-bit code data indicator indicates a content type of the m symbol chunks.

Claims (46)

1. A method comprising:

transmitting a plurality of coding units for each micro-packet in each of one or more lanes of a DisplayPort Main Link from a DisplayPort transmitter, wherein each of the coding units comprises:

a group of m symbol chunks, each symbol chunk including four 8-bit symbols, wherein m is 2 or 4, and wherein all of the symbol chunks in the group have one of a plurality of content types; and

an n-bit code data indicator, wherein n is 2 or 4, wherein the n-bit code data indicator indicates the one of the plurality of content types.

2. The method of claim 1 , wherein the content types comprise:

a data link symbol, or one or more of a control link symbol, a Reed Solomon (RS) parity symbol, or a PHY sync symbol.

3. The method of claim 1 , further comprising:

transmitting eight coding units per lane in each of four lanes of the DisplayPort Main Link for each micro-packet.

4. The method of claim 1 , further comprising:

transmitting 16 coding units per lane in each of two lanes of the DisplayPort Main Link for each micro-packet.

5. The method of claim 1 , further comprising:

transmitting 32 coding units per lane in a single lane of the DisplayPort Main Link for each micro-packet.

6. A method comprising:

receiving a plurality of coding units for each micro-packet in each of one or more lanes of a DisplayPort Main Link from a DisplayPort transmitter, wherein each of the coding units comprises:

a group of m symbol chunks, each symbol chunk including four 8-bit symbols, wherein m is 2 or 4, and wherein all of the symbol chunks in the group have one of a plurality of content types; and

an n-bit code data indicator, wherein n is 2 or 4, wherein the n-bit code data indicator indicates the one of the plurality of content types.

7. The method of claim 6 , wherein the content types comprise:

a data link symbol, or one or more of a control link symbol, a Reed Solomon (RS) parity symbol, or a PHY sync symbol.

8. The method of claim 6 , further comprising:

receiving eight coding units per lane in each of four lanes of the DisplayPort Main Link for each micro-packet.

9. The method of claim 6 , further comprising:

receiving 16 coding units per lane in each of two lanes of the DisplayPort Main Link for each micro-packet.

10. The method according to claim 6 , further comprising:

receiving 32 coding units per lane in a single lane of the DisplayPort Main Link for each micro-packet.

11. A transmission device for a DisplayPort interface comprising:

one or more lane serializer-drivers; and

a PHY logical sub-layer configured to arrange and transmit data to the one or more lane serializer-drivers, wherein the data comprises a plurality of coding units for each micro-packet directed to each of the one or more lane serializer-drivers, and wherein each of the coding units comprises:

a group of m symbol chunks, each symbol chunk including four 8-bit symbols, wherein m is 2 or 4, and wherein all of the symbol chunks in the group have one of a plurality of content types; and

an n-bit code data indicator, wherein n is 2 or 4, wherein the n-bit code data indicator indicates the one of the plurality of content types.

12. The transmission device of claim 11 , wherein the content types comprise:

a data link symbol, or one or more of a control link symbol, a Reed Solomon (RS) parity symbol, or a PHY sync symbol.

13. The transmission device of claim 11 , wherein eight coding units per lane are transmitted for each micro-packet in each of four lanes of the DisplayPort Main Link.

14. The transmission device of claim 11 , wherein 16 coding units per lane are transmitted for each micro-packet in each of two lanes of the DisplayPort Main Link.

15. The transmission device of claim 11 , wherein 32 coding units per lane are transmitted for each micro-packet in a single lane of the DisplayPort Main Link.

16. The transmission device of claim 11 , further comprising:

one or more High-bandwidth Digital Content Protection (HDCP) encryption circuits communicatively coupled to the PHY logical sub-layer element for encrypting data.

17. The transmission device of claim 11 , wherein the PHY logical sub-layer is further configured to perform Reed Solomon (RS) Forward Error Correction on the data.

18. A reception device for a DisplayPort interface comprising:

a receiver configured to receive a plurality of coding units for each micro-packet in each of one or more lanes of a DisplayPort Main Link from a DisplayPort transmitter, wherein each of the coding units comprises:

a group of m symbol chunks, each symbol chunk including four 8-bit symbols, wherein m is 2 or 4, and wherein all of the symbol chunks in the group have one of a plurality of content types; and

an n-bit code data indicator, wherein n is 2 or 4, wherein the n-bit code data indicator indicates the one of the plurality of content types.

19. The reception device of claim 18 , wherein the content types comprise:

a data link symbol, or one or more of a control link symbol, a Reed Solomon (RS) parity symbol, or a PHY sync symbol.

20. The reception device of claim 18 , wherein eight coding units per lane are received for each micro-packet in each of four lanes of the DisplayPort Main Link.

21. The reception device of claim 18 , wherein 16 coding units per lane are received for each micro-packet in each of two lanes of the DisplayPort Main Link.

22. The reception device of claim 18 , wherein 32 coding units per lane are received for each micro-packet in a single lane of the DisplayPort Main Link.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2024
From: KINETIC TECHNOLOGIES INTERNATIONAL HOLDINGS LP
To: AY DEE KAY LLC DBA INDIE SEMICONDUCTOR
Reel/Frame 068037/0425 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2023
From: NAGARAJA, JYOTHSNA
To: KINETIC TECHNOLOGIES INTERNATIONAL HOLDINGS LP
Reel/Frame 065515/0534 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2023
From: AGARWAL, RAHUL KUMAR
To: KINETIC TECHNOLOGIES INTERNATIONAL HOLDINGS LP
Reel/Frame 065515/0601 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2022
From: KINETIC TECHNOLOGIES
To: KINETIC TECHNOLOGIES INTERNATIONAL HOLDINGS LP
Reel/Frame 059852/0228 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2020
From: KOBAYASHI, ALAN; THOMAS, SUJAN VALIYAKA; CHILUKURI, RAMAKRISHNA
To: MEGACHIPS TECHNOLOGY AMERICA CORPORATION
Reel/Frame 054686/0576 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2020
From: KOBAYASHI, ALAN; THOMAS, SUJAN VALIYAKA; CHILUKURI, RAMAKRISHNA
To: MEGACHIPS TECHNOLOGY AMERICA CORPORATION
Reel/Frame 054686/0636 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2020
From: KOBAYASHI, ALAN; THOMAS, SUJAN VALIYAKA; CHILUKURI, RAMAKRISHNA
To: MEGACHIPS TECHNOLOGY AMERICA CORPORATION
Reel/Frame 054686/0721 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2020
From: MEGACHIPS TECHNOLOGY AMERICA CORPORATION
To: KINETIC TECHNOLOGIES
Reel/Frame 054686/0856 →