Neuron circuit and artificial neural network chip
A neuron circuit and an artificial neural network chip are provided. The neuron circuit includes a memristor and an integrator. The memristor generates a pulse train having an oscillation frequency when an applied voltage exceeds a predetermined threshold. The integrator is connected in parallel to the memristor for receiving and accumulating input pulses transmitted by a previous layer network at different times, and driving the memristor to transmit the pulse train to a next layer network when a voltage of the accumulated input pulses exceeds the predetermined threshold.
1. A neuron circuit, comprising:
a memristor, generating a pulse train having an oscillation frequency when an applied voltage exceeds a predetermined threshold; and
an integrator, connected in parallel to the memristor for receiving and accumulating input pulses transmitted by a previous layer network at different times, and driving the memristor to transmit the pulse train to a next layer network when a voltage of the accumulated input pulses exceeds the predetermined threshold.
2. The neuron circuit according to claim 1 , wherein a frequency of the pulse train is related to an operating energy of the memristor.
3. The neuron circuit according to claim 1 , wherein the memristor comprises a magnetoresistive random access memory (MRAM), a variable resistive random access memory (RRAM) or a phase-change memory (PCM).
4. A neuron circuit, comprising:
a memristor, generating a pulse train having an oscillation frequency when an applied voltage exceeds a predetermined threshold; and
a current-voltage converter, connected in parallel to the memristor for receiving an input pulse transmitted by a previous layer network, and driving the memristor to transmit the pulse train to a next layer network when a voltage of the input pulse exceeds the predetermined threshold.
5. The neuron circuit according to claim 4 , wherein a frequency of the pulse train is related to an operating energy of the memristor.
6. The neuron circuit according to claim 5 , wherein the memristor comprises a magnetoresistive random access memory, a variable resistive random access memory or a phase-change memory.
7. An artificial neural network chip, comprising:
a synapse array, comprising n*m synapse elements respectively connecting a plurality of input terminals and a plurality of output terminals, wherein the synapse elements in the same row are connected to the same input terminal, the synapse elements in the same column are connected to the same output terminal, and n and m are positive integers;
a plurality of neuron circuits, an input terminal of each of the neuron circuits is connected to one of the output terminals; and
a control circuit, respectively connected to the input terminals and output terminals of the neuron circuits for adjusting a weight of each of the synapse elements, and monitoring a pulse train transmitted by each of the neuron circuits, wherein
each of the neuron circuits comprises:
a memristor, generating a pulse train having an oscillation frequency when an applied voltage exceeds a predetermined threshold; and
an integrator, connected in parallel to the memristor for receiving and accumulating input pulses input by a previous layer network through the input terminal and passed through the synaptic element, and driving the memristor to transmit the pulse train to a next layer network when a voltage of the accumulated input pulses exceeds the predetermined threshold.
8. The artificial neural network chip according to claim 7 , wherein the integrator is realized by a current-voltage converter, and drives the memristor to transmit the pulse train to the next layer network when a voltage of the input pulses input by the previous layer network through the input terminal and passed through the synaptic element exceeds the predetermined threshold.
9. The artificial neural network chip according to claim 7 , wherein the synapse elements are realized by memristors.
10. The artificial neural network chip according to claim 7 , wherein the memristor comprises a magnetoresistive random access memory, a variable resistive random access memory or a phase-change memory.