Server for providing television and system and method for use of same

1. A server for providing television comprising:

a housing securing a processor, memory, buffer, and a network interface controller therein;

a busing architecture communicatively interconnecting the processor, the memory, the buffer, and the network interface controller therebetween;

the busing architecture communicatively interconnecting the network interface controller to a plurality of receiving queues, each of the plurality of receiving queues having a respective content buffer, a respective decryption device, and a respective decoder;

the network interface controller configured to receive a source internet protocol television signal from an external source, the source internet protocol television signal including a plurality of channels, each of the plurality of channels having periodic, sequential signal access points that permit tuning initiation;

the network interface controller receiving the plurality of channels simultaneously, each of the plurality of channels of the source internet protocol television signal being assigned to one of the plurality of receiving queues;

the network interface controller configured to receive and at least partially prepare a first channel from the plurality of channels of the source internet protocol television signal, the network interface controller providing an at least partially prepared first channel signal;

the network interface controller configured to receive and at least partially prepare a second channel from the plurality of channels of the source internet protocol television signal, the network interface controller providing an at least partially prepared second channel signal;

the network interface controller being fully enabled to start simultaneous decryption and decoding of the first channel and the second channel; and

the memory accessible to the processor, the memory including processor-executable instructions that, when executed, cause the processor to:

buffer in the buffer the at least partially prepared second channel signal,

track in the buffer, the at least partially prepared second channel signal beginning at a recent, periodic, sequential signal access point,

in response to receiving a channel request instruction from a requesting television, access from the buffer, the at least partially prepared second channel signal beginning at the recent, periodic, sequential signal access point, and

transform the at least partially prepared second channel signal to be an at least partially processed second channel signal.

2. The server as recited in claim 1 , wherein the server is located in communication with a property headend co-located with a plurality of televisions.

3. The server as recited in claim 1 , wherein the at least partially prepared second channel signal comprises a fully prepared second channel signal.

4. The server as recited in claim 1 , wherein the at least partially processed second channel signal comprises a fully prepared second channel signal.

5. The sever as recited in claim 1 , wherein the network interface controller further comprises circuitry providing a full network protocol stack with network traffic processing capabilities.

6. The server as recited in claim 1 , wherein the internet protocol television signal further comprises an internet protocol suite over a packet-switched network.

7. The server as recited in claim 1 , wherein the first channel comprises video on demand.

8. The server as recited in claim 1 , wherein the first channel comprises live programming content.

9. The server as recited in claim 1 , wherein the first channel comprises pre-buffered content.

10. The server as recited in claim 1 , wherein the network interface controller is dynamically assigned a channel.

11. The server as recited in claim 1 , wherein the network interface controller is assigned a channel frequently tuned.

12. The server as recited in claim 1 , wherein the processor-executable instructions to track in the buffer, the at least partially prepared second channel beginning at the recent, periodic, sequential signal access point further comprise processor-executable instructions causing the processor to track in the buffer, the at least partially prepared second channel beginning at a most recent, periodic, sequential signal access point.

13. The server as recited in claim 1 , wherein the processor-executable instructions to track in the buffer, the at least partially prepared second channel beginning at the recent, periodic, sequential signal access point further comprise processor-executable instructions causing the processor to:

track in the buffer, the at least partially prepared second channel beginning at a first periodic, sequential signal access point; and

track in the buffer, the at least partially prepared second channel beginning at a second periodic, sequential signal access point, the second periodic, sequential signal access point being subsequent in time to the first periodic, sequential signal access point.

14. The server as recited in claim 12 , wherein the processor-executable instructions to track in the buffer, the at least partially prepared second channel beginning at the recent, periodic, sequential signal access point further comprise processor-executable instructions causing the processor to:

make available for deletion a portion of the buffered, at least partially prepared second channel in the buffer previous to the most recent, periodic, sequential signal access point.

15. The server as recited in claim 12 , wherein the processor-executable instructions to track in the buffer, the at least partially prepared second channel beginning at the recent, periodic, sequential signal access point further comprise processor-executable instructions causing the processor to:

make available for over-write the portion of the buffered, at least partially prepared second channel in the buffer previous to the most recent, periodic, sequential signal access point.

16. A server for providing television comprising:

a housing securing a processor, memory, buffer, and a network interface controller therein;

a busing architecture communicatively interconnecting the processor, the memory, the buffer, and the network interface controller therebetween;

the busing architecture communicatively interconnecting the network interface controller to a plurality of receiving queues, each of the plurality of receiving queues having a respective content buffer, a respective decryption device, and a respective decoder;

the network interface controller configured to receive a source internet protocol television signal from an external source, the source internet protocol television signal including a plurality of channels, each of the plurality of channels having periodic, sequential signal access points that permit tuning initiation;

the network interface controller receiving the plurality of channels simultaneously, each of the plurality of channels of the source internet protocol television signal being assigned to one of the plurality of receiving queues;

the network interface controller including circuitry providing a full network protocol stack with network traffic processing capabilities;

the network interface controller configured to receive and at least partially prepare a first channel from the plurality of channels of the source internet protocol television signal, the network interface controller providing an at least partially prepared first channel signal;

the network interface controller configured to receive and at least partially prepare a second channel from the plurality of channels of the source internet protocol television signal, the network interface controller providing an at least partially prepared second channel signal;

the network interface controller being fully enabled to start simultaneous decryption and decoding of the first channel and the second channel; and

the memory accessible to the processor, the memory including processor-executable instructions that, when executed, cause the processor to:

buffer in the buffer the at least partially prepared second channel signal,

track in the buffer, the at least partially prepared second channel signal beginning at a recent periodic, sequential signal access point,

in response to receiving a channel request instruction from a requesting television of the plurality of televisions, access from the buffer, the at least partially prepared second channel signal beginning at the recent periodic, sequential signal access point, and

transform the buffered, at least partially prepared second channel signal to be an at least partially processed second channel signal.

17. The server as recited in claim 16 , wherein the first channel comprises video on demand.

18. The server as recited in claim 16 , wherein the first channel comprises live programming content.

19. The server as recited in claim 16 , wherein the first channel comprises pre-buffered content.

20. A server for providing television comprising:

a housing securing a processor, memory, buffer, and a network interface controller therein;

a busing architecture communicatively interconnecting the processor, the memory, the buffer, and the network interface controller therebetween;

the busing architecture communicatively interconnecting the network interface controller to a plurality of receiving queues, each of the plurality of receiving queues having a respective content buffer, a respective decryption device, and a respective decoder;

the network interface controller configured to receive a source internet protocol television signal from an external source as video streaming media, the source internet protocol television signal including a plurality of channels, each of the plurality of channels having periodic, sequential signal access points that permit tuning initiation;

the network interface controller receiving the plurality of channels simultaneously, each of the plurality of channels of the source internet protocol television signal being assigned to one of the plurality of receiving queues;

the network interface controller including circuitry providing a full network protocol stack with network traffic processing capabilities;

the network interface controller configured to receive and at least partially prepare a first channel from the plurality of channels of the source internet protocol television signal, the network interface controller providing an at least partially prepared first channel signal;

the network interface controller configured to receive and at least partially prepare a second channel from the plurality of channels of the source internet protocol television signal, the network interface controller providing an at least partially prepared second channel signal;

the network interface controller being fully enabled to start simultaneous decryption and decoding of the first channel and the second channel; and

the memory accessible to the processor, the memory including processor-executable instructions that, when executed, cause the processor to:

provide two-way communications with an internet protocol network communicating with the network interface controller,

decode the video streaming media received on the internet protocol television signal,

buffer in the buffer the at least partially prepared second channel signal,

track in the buffer, the at least partially prepared second channel signal beginning at a recent periodic, sequential signal access point,

in response to receiving a channel request instruction from a requesting television of a plurality of televisions, access from the buffer, the at least partially prepared second channel signal beginning at the recent periodic, sequential signal access point, and

transform the buffered, at least partially prepared second channel signal to be an at least partially processed second channel signal.