IP Library Granted Patent US 11,211,290
Granted Patent B2
US 11,211,290 · App. 16/820,961 · Granted Dec 28, 2021

MIM capacitor with adjustable capacitance via electronic fuses

Inventors: Jonghae Kim (San Diego, CA); Jin-Su Ko (San Jose, CA); Beomsup Kim (Los Altos Hills, CA); Periannan Chidambaram (San Diego, CA)
Assignee: Qualcomm Incorporated
H01L21/76891H01L23/5223H01L28/40
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,211,290
App. No.
16/820,961
Granted
Dec 28, 2021
Kind
B2
Abstract

Certain aspects of the present disclosure are generally directed to techniques and apparatus for adjusting capacitance in one or more metal-insulator-metal (MIM) capacitors in an effort to reduce capacitance variation between semiconductor devices and improve yield during fabrication. One example method for fabricating a semiconductor device generally includes measuring a capacitance value of a MIM capacitor of the semiconductor device, determining the measured capacitance value of the MIM capacitor is above a target capacitance value for the MIM capacitor, and selectively rupturing a set of connections in the MIM capacitor based on the measured capacitance value. Selectively rupturing the set of connections in the MIM capacitor may reduce the capacitance value of the MIM capacitor to a value approximately that of the target capacitance value.

Claims (21)

1. A method for fabricating a semiconductor device, comprising:

measuring a capacitance value of a metal-insulator-metal (MIM) capacitor of the semiconductor device, wherein:

the MIM capacitor comprises a first metal layer, a first dielectric layer disposed above the first metal layer, and a second metal layer disposed above the first dielectric layer;

the second metal layer comprises a primary metal plate and a plurality of secondary metal plates; and

the plurality of secondary metal plates are connected between the primary metal plate and a contact electrode via a plurality of connections;

determining the measured capacitance value of the MIM capacitor is above a target capacitance value for the MIM capacitor; and

selectively rupturing a set of the plurality of connections based on the measured capacitance value.

2. The method of claim 1 , further comprising determining a current level to selectively rupture the set of the plurality of connections based on a difference between the measured capacitance value and the target capacitance value for the MIM capacitor, wherein the set of the plurality of connections are selectively ruptured by applying the determined current level between the primary metal plate and the contact electrode.

3. The method of claim 1 , wherein selectively rupturing the set of the plurality of connections decreases the capacitance value of the MIM capacitor to a value that is approximately the target capacitance value.

4. The method of claim 1 , wherein each secondary metal plate of the plurality of secondary metal plates of the MIM capacitor has a different unique area such that each secondary metal plate of the plurality of secondary metal plates is associated with a different unique capacitance value.

5. The method of claim 1 , wherein the contact electrode is disposed in the second metal layer and wherein the contact electrode is disposed adjacent to the plurality of secondary metal plates.

6. The method of claim 1 , wherein:

the semiconductor device includes another MIM capacitor comprising a third metal layer, a second dielectric layer disposed above the third metal layer, and a fourth metal layer disposed above the second dielectric layer;

the fourth metal layer comprises another primary metal plate and another plurality of secondary metal plates; and

the other plurality of secondary metal plates are connected between the other primary metal plate and another contact electrode via another plurality of connections.

7. The method of claim 6 , further comprising:

measuring a capacitance value of the other MIM capacitor;

determining the measured capacitance value of the other MIM capacitor is above a target capacitance value for the other MIM capacitor; and

selectively rupturing a set of the other plurality of connections.

8. The method of claim 6 , wherein the other MIM capacitor is coupled in series with the MIM capacitor.

9. The method of claim 6 , wherein the third metal layer is the same as the first metal layer, the second dielectric layer is the same as the first dielectric layer, and the fourth metal layer is the same as the second metal layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2021
From: KIM, JONGHAE; KO, JIN-SU; KIM, BEOMSUP; CHIDAMBARAM, PERIANNAN
To: QUALCOMM INCORPORATED
Reel/Frame 055951/0328 →
Continuity (1)
Related Publication 20210296170A1 · Sep 23, 2021