IP Library Granted Patent US 11,086,780
Granted Patent B1
US 11,086,780 · App. 16/826,856 · Granted Aug 10, 2021

Scratchpad journaling mechanism for performance optimization

Inventors: Boris Glimcher (Bnei Brak, IL); Amitai Alkalay (Kadima, IL)
Assignee: EMC IP Holding Company LLC
G06F12/0842G06F3/065G06F11/2056G06F11/2084G06F3/064G06F3/0617G06F3/0683G06F11/2058G06F12/1018G06F2212/604G06F2212/608
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Quick Facts
Patent No.
US 11,086,780
App. No.
16/826,856
Granted
Aug 10, 2021
Kind
B1
Abstract

An aspect includes providing a scratchpad memory to at least one persistent storage device of a plurality of persistent storage devices in a storage array. The scratchpad memory includes non-volatile storage. An aspect also includes designating the scratchpad memory for storing data corresponding to write operations implemented by a storage system, apportioning the scratchpad memory among each storage controller of a plurality of storage controllers in the storage system, and receiving, at the scratchpad memory, a write request from one of the storage controllers. An aspect further includes writing data of the write request to a location in the scratchpad memory based on the apportioning and corresponding to the one of the storage controllers.

Claims (53)

1. A method, comprising:

providing a scratchpad memory to at least one persistent storage device of a plurality of persistent storage devices in a storage array, the scratchpad memory including non-volatile storage;

designating the scratchpad memory for storing data corresponding to write operations implemented by a storage system;

apportioning the scratchpad memory among each storage controller of a plurality of storage controllers in the storage system;

receiving, at the scratchpad memory, a write request from one of the storage controllers, the write request including a level of protection, wherein the level of protection indicates a number of times data of the write request is to be mirrored; and

writing the data of the write request to a location in the scratchpad memory based on the apportioning and corresponding to the one of the storage controllers.

2. The method of claim 1 , wherein the level of protection in the write request is a first level of protection corresponding to the write request and the location is a first location, the method further comprising:

mirroring the data of the write request, internally by the scratchpad memory, to a secondary location in the scratchpad memory based on the apportioning and the first level of protection, wherein the first level of protection indicates single co protection mode.

3. The method of claim 2 , wherein writing the data of the write request to the first location in the scratchpad memory is performed simultaneously with the mirroring the data of the write request to the secondary location in the scratchpad memory.

4. The method of claim 1 , wherein the level of protection in the write request is a second level of protection corresponding to the write request and the location is a first location, the method further comprising:

mirroring the data of the write request, internally by the scratchpad memory, to a secondary location and to a tertiary location in the scratchpad memory based on the apportioning and the second level of protection, wherein the second level of protection is three-copy protection mode.

5. The method of claim 1 , wherein the storage system is a content-addressable storage system, the method further comprising:

providing a list of addresses to the scratchpad memory via each of the storage controllers through an application programming interface (API) that is communicatively coupled to respective storage controllers and the scratchpad memory, the list of addresses including offsets pointing to the scratchpad memory; and

receiving, via the API from the scratchpad memory, a list of hash keys corresponding to written blocks in the scratchpad memory, the hash keys facilitating subsequent read operations;

wherein writing the data of the write request to a location in the scratchpad memory based on the apportioning is implemented via the list of addresses and corresponding hash keys.

6. The method of claim 1 , wherein the scratchpad memory includes at least one of virtual storage and physical storage.

7. The method of claim 1 , wherein the scratchpad memory includes a combination of dynamic random access memory (DRAM) and non-volatile dual in-line memory modules (NVDIMMs).

8. The method of claim 1 , wherein the plurality of persistent storage devices comprises solid state disks.

9. The method of claim 1 , wherein the plurality of persistent storage devices comprises a collection of flash disks.

10. A storage system, comprising:

a memory comprising computer-executable instructions; and

a processor operable by the storage system, the processor executing the computer-executable instructions, the computer-executable instructions when executed by the processor cause the processor to perform operations comprising:

providing a scratchpad memory to at least one persistent storage device of a plurality of persistent storage devices in a storage array, the scratchpad memory including non-volatile storage;

designating the scratchpad memory for storing data corresponding to write operations implemented by the storage system;

apportioning the scratchpad memory among each storage controller of a plurality of storage controllers in the storage system;

receiving, at the scratchpad memory, a write request from one of the storage controllers, the write request including a level of protection, wherein the level of protection indicates a number of times data of the write request is to be mirrored; and

writing the data of the write request to a location in the scratchpad memory based on the apportioning and corresponding to the one of the storage controllers.

11. The system of claim 10 , wherein the level of protection in the write request is a first level of protection corresponding to the write request and the location is a first location, the operations further comprising:

mirroring the data of the write request, internally by the scratchpad memory, to a secondary location in the scratchpad memory based on the apportioning and the first level of protection, wherein the first level of protection indicates single copy protection mode;

wherein writing the data of the write request to the first location in the scratchpad memory is performed simultaneously with the mirroring the data of the write request to the secondary location in the scratchpad memory.

12. The system of claim 10 , wherein the level of protection in the write request is a second level of protection corresponding to the write request and the location is a first location, the operations further comprising:

mirroring the data of the write request, internally by the scratchpad memory, to a secondary location and to a tertiary location in the scratchpad memory based on the apportioning and the second level of protection, wherein the second level of protection is three-co protection mode.

13. The system of claim 10 , wherein the storage system is a content-addressable storage system, the operations further comprising:

providing a list of addresses to the scratchpad memory via each of the storage controllers through an application programming interface (API) that is communicatively coupled to respective storage controllers and the scratchpad memory, the list of addresses including offsets pointing to the scratchpad memory; and

receiving, via the API from the scratchpad memory, a list of hash keys corresponding to written blocks in the scratchpad memory, the hash keys facilitating subsequent read operations;

wherein writing the data of the write request to a location in the scratchpad memory based on the apportioning is implemented via the list of addresses and corresponding hash keys.

14. The system of claim 10 , wherein the scratchpad memory includes at least one of virtual storage and physical storage.

15. The system of claim 10 , wherein the scratchpad memory includes a combination of dynamic random access memory (DRAM) and non-volatile dual in-line memory modules (NVDIMMs).

16. The system of claim 10 , wherein the plurality of persistent storage devices comprises solid state disks.

17. The system of claim 10 , wherein the plurality of persistent storage devices comprises a collection of flash disks.

18. A computer program product embodied on a non-transitory computer readable medium, the computer program product including instructions that, when executed by a computer, causes the computer to perform operations comprising:

providing a scratchpad memory to at least one persistent storage device of a plurality of persistent storage devices in a storage array, the scratchpad memory including non-volatile storage;

designating the scratchpad memory for storing data corresponding to write operations implemented by the storage system;

apportioning the scratchpad memory among each storage controller of a plurality of storage controllers in the storage system;

receiving, at the scratchpad memory, a write request from one of the storage controllers, the write request including a level of protection, wherein the level of protection indicates a number of times data of the write request is to be mirrored; and

writing the data of the write request to a location in the scratchpad memory based on the apportioning and corresponding to the one of the storage controllers.

19. The computer program product of claim 18 , wherein the level of protection in the write request is a first level of protection corresponding to the write request and the location is a first location, the operations further comprising:

mirroring the data of the write request, internally by the scratchpad memory, to a secondary location in the scratchpad memory based on the apportioning and the first level of protection, wherein the first level of protection indicates single copy protection mode;

wherein writing the data of the write request to the first location in the scratchpad memory is performed simultaneously with the mirroring the data of the write request to the secondary location in the scratchpad memory.

20. The computer program product of claim 18 , wherein the storage system is a content-addressable storage system, the operations further comprising:

providing a list of addresses to the scratchpad memory via each of the storage controllers through an application programming interface (API) that is communicatively coupled to respective storage controllers and the scratchpad memory, the list of addresses including offsets pointing to the scratchpad memory; and

receiving, via the API from the scratchpad memory, a list of hash keys corresponding to written blocks in the scratchpad memory, the hash keys facilitating subsequent read operations;

wherein writing the data of the write request to a location in the scratchpad memory based on the apportioning is implemented via the list of addresses and corresponding hash keys.

Assignments (11)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052851/0081) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0441 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052851/0917) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0509 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052852/0022) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0582 →
RELEASE OF SECURITY INTEREST AT REEL 052771 FRAME 0906 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0298 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052851/0917 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC; THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052851/0081 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052852/0022 →
SECURITY AGREEMENT Recorded May 28, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 052771/0906 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2020
From: GLIMCHER, BORIS; ALKALAY, AMITAI
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 052203/0728 →