IP Library Granted Patent US 11,239,977
Granted Patent B2
US 11,239,977 · App. 16/831,462 · Granted Feb 1, 2022

Apparatus, system and method of acknowledging a multi user (MU) multiple-input-multiple-output (MIMO) (MU-MIMO) transmission

Inventors: Cheng Chen (Portland, OR); Carlos Cordeiro (Portland, OR); Claudio Da Silva (Portland, OR); Oren Kedem (Modiin Maccabim-Reut, IL)
Assignee: INTEL CORPORATION
H04L5/0055H04B7/0452H04W72/044H04W72/0413
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Quick Facts
Patent No.
US 11,239,977
App. No.
16/831,462
Granted
Feb 1, 2022
Kind
B2
Abstract

For example, an EDMG STA may be configured to receive an A-MPDU for the EDMG STA in an EDMG MU PPDU from an EDMG MU-MIMO initiator station; to determine, according to an ordered acknowledgement scheme, a Block Acknowledgement (BA) period in which the EDMG STA is to be awake to allow transmission of a BA from the EDMG STA to the EDMG MU-MIMO initiator STA; to allow the EDMG STA to be in a power save mode during a first power save period from a time of an End of Frame (EOF) field in the A-MPDU for the EDMG STA until a beginning of the BA period; to transmit the BA to the EDMG MU-MIMO initiator; and to allow the EDMG STA to be in the power save mode during a second power save period after transmission of the BA.

Claims (30)

1. An apparatus comprising:

a processor comprising logic and circuitry configured to cause an Enhanced Directional Multi-Gigabit (DMG) (EDMG) MU Multiple-Input-Multiple-Output (MIMO) (MU-MIMO) initiator to:

transmit an EDMG Multi User (MU) Physical Layer (PHY) Protocol Data Unit (PPDU) to a plurality of EDMG STAs, the EDMG MU PPDU comprising a plurality of Aggregate Medium Access Control (MAC) Protocol Data Units (A-MPDUs);

set a time period after the EDMG MU PPDU, the time period comprising a sequence of a plurality of Block Acknowledgement (BA) periods for the plurality of EDMG STAs, a BA period of the plurality of BA periods configured for transmission of a BA from an EDMG STA of the plurality of EDMG STAs, wherein the processor is configured to cause the EDMG MU-MIMO initiator to provide to the EDMG STA information for determining the BA period for transmission of the BA from the EDMG STA; and

process one or more BAs from one or more EDMG STAs of the plurality of EDMG STAs, the one or more BAs received from the one or more EDMG STAs during one or more respective BA periods of the plurality of BA periods; and

a memory to store information processed by the processor.

2. The apparatus of claim 1 configured to cause the EDMG MU-MIMO initiator to transmit a BA Request (BAR) after the time period, the EDMG MU-MIMO initiator to transmit the BAR to an EDMG STA from which a BA is not received during the time period.

3. The apparatus of claim 1 , wherein the information for determining the BA period comprises information for determining a beginning of the BA period.

4. The apparatus of claim 1 , wherein the BA period is based on a predefined Modulation and Coding Scheme (MCS) value.

5. The apparatus of claim 4 , wherein the predefined MCS value is 0.

6. The apparatus of claim 1 configured to cause the EDMG MU-MIMO initiator to transmit the EDMG MU PPDU and to receive the one or more BAs over a channel bandwidth of at least 2.16 Gigahertz (GHz) in a frequency band above 45.

7. The apparatus of claim 1 comprising a radio, the processor configured to cause the radio to transmit the EDMG MU PPDU.

8. The apparatus of claim 7 comprising one or more antennas connected to the radio, and another processor to execute instructions of an operating system.

9. A product comprising one or more computer-readable non-transitory storage media comprising computer-executable instructions operable to, when executed by at least one processor, enable the at least one processor to cause an Enhanced Directional Multi-Gigabit (DMG) (EDMG) MU Multiple-Input-Multiple-Output (MIMO) (MU-MIMO) initiator to:

transmit an EDMG Multi User (MU) Physical Layer (PHY) Protocol Data Unit (PPDU) to a plurality of EDMG STAs, the EDMG MU PPDU comprising a plurality of Aggregate Medium Access Control (MAC) Protocol Data Units (A-MPDUs);

set a time period after the EDMG MU PPDU, the time period comprising a sequence of a plurality of Block Acknowledgement (BA) periods for the plurality of EDMG STAs, a BA period of the plurality of BA periods configured for transmission of a BA from an EDMG STA of the plurality of EDMG STAs, wherein the instructions, when executed, cause the EDMG MU-MIMO initiator to provide to the EDMG STA information for determining the BA period for transmission of the BA from the EDMG STA; and

process one or more BAs from one or more EDMG STAs of the plurality of EDMG STAs, the one or more BAs received from the one or more EDMG STAs during one or more respective BA periods of the plurality of BA periods.

10. The product of claim 9 , wherein the instructions, when executed, cause the EDMG MU-MIMO initiator to transmit a BA Request (BAR) after the time period, the BAR to be transmitted to an EDMG STA from which a BA is not received during the time period.

11. The product of claim 9 , wherein the information for determining the BA period comprises information for determining a beginning of the BA period.

12. The product of claim 9 , wherein the BA period is based on a predefined Modulation and Coding Scheme (MCS) value.

13. The product of claim 12 , wherein the predefined MCS value is 0.

14. The product of claim 9 , wherein the instructions, when executed, cause the EDMG MU-MIMO initiator to transmit the EDMG MU PPDU and to receive the one or more BAs over a channel bandwidth of at least 2.16 Gigahertz (GHz) in a frequency band above 45.

15. An apparatus comprising:

means for causing an Enhanced Directional Multi-Gigabit (DMG) (EDMG) MU Multiple-Input-Multiple-Output (MIMO) (MU-MIMO) initiator to transmit an EDMG Multi User (MU) Physical Layer (PHY) Protocol Data Unit (PPDU) to a plurality of EDMG STAs, the EDMG MU PPDU comprising a plurality of Aggregate Medium Access Control (MAC) Protocol Data Units (A-MPDUs);

means for setting a time period after the EDMG MU PPDU, the time period comprising a sequence of a plurality of Block Acknowledgement (BA) periods for the plurality of EDMG STAs, a BA period of the plurality of BA periods configured for transmission of a BA from an EDMG STA of the plurality of EDMG STAs;

means for causing the EDMG MU-MIMO initiator to provide to the EDMG STA information for determining the BA period for transmission of the BA from the EDMG STA; and

means for processing one or more BAs from one or more EDMG STAs of the plurality of EDMG STAs, the one or more BAs received from the one or more EDMG STAs during one or more respective BA periods of the plurality of BA periods.

16. The apparatus of claim 15 comprising means for causing the EDMG MU-MIMO initiator to transmit a BA Request (BAR) after the time period, the BAR to be transmitted to an EDMG STA from which a BA is not received during the time period.

17. The apparatus of claim 15 , wherein the BA period is based on a predefined Modulation and Coding Scheme (MCS) value.

18. The apparatus of claim 15 , wherein the information for determining the BA period comprises information for determining a beginning of the BA period.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 056337/0609 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2020
From: CHEN, CHENG; CORDEIRO, CARLOS; DA SILVA, CLAUDIO; KEDEM, OREN
To: INTEL IP CORPORATION
Reel/Frame 052740/0582 →
Continuity (3)
Continuation 16625744
Provisional Application 62523380 · Jun 22, 2017
Related Publication 20200228294A1 · Jul 16, 2020