IP Library Granted Patent US 11,748,001
Granted Patent B2
US 11,748,001 · App. 16/831,689 · Granted Sep 5, 2023

Techniques to predict or determine time-to-ready for a storage device

Inventors: Joseph D. Tarango (Longmont, CO); Jim S. Baca (Longmont, CO)
Assignee: SK hynix NAND Product Solutions Corp.
G06F3/0629G06F3/0616G06F3/0679G06N5/04
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Quick Facts
Patent No.
US 11,748,001
App. No.
16/831,689
Granted
Sep 5, 2023
Kind
B2
Abstract

Examples may include techniques to predict or determine time-to-ready (TTR) for a storage device. TTR may be predicted or determined based on operating information included in a snapshot associated with a first time interval during operation of the storage device. The TTR predicted or determined indicates an amount of time the storage device will be at an operational state following a power loss recover of the storage device.

Claims (45)

1. An apparatus comprising:

a first interface to couple with a compute device;

a second interface to couple with one or more memory die; and

a controller coupled with the first and second interfaces, the controller to include circuitry to:

obtain first operating information included in a snapshot for a data storage device, the snapshot associated with a first time interval during operation of the data storage device while coupled to a computing device; and

predict, based on the first operating information, a time-to-ready (TTR) value that indicates an amount of time the data storage device will be at an operational state following a power loss recovery of the data storage device.

2. The apparatus of claim 1 , further comprising the circuitry to:

determine whether the predicted TTR value meets a TTR requirement to bring the data storage device to an operational state within a threshold time; and

cause a configuration change to the data storage device based on the predicted TTR value indicating that a time to bring the data storage device to the operational state exceeds the threshold time.

3. The apparatus of claim 2 , further comprising the circuitry to:

obtain second operating information included in a second snapshot for the data storage device, the second snapshot associated with a second time interval during operation of the data storage device following the configuration change to the data storage device; and

predict, based on the second operating information, a second TTR value that indicates a second amount of time the data storage device will be at an operational state following a power loss recovery of the data storage device.

4. The apparatus of claim 2 , further comprising:

one or more memory die coupled with the first interface, the one or more memory die to include non-volatile memory.

5. The apparatus of claim 4 , the data storage device comprises a solid state drive (SSD), the configuration change to cause an increase in spare space for the non-volatile memory.

6. The apparatus of claim 5 , the circuitry to predict the TTR value based on summing a first sub-interval time for initializing hardware at a controller for the SSD, a second sub-interval time for discovery of the SSD by the compute device via the first interface, a third sub-interval for a slow context load and a fourth sub-interval for a fast context load.

7. A method comprising:

obtaining first operating information included in a snapshot for a data storage device, the snapshot associated with a first time interval during operation of the data storage device while coupled to a compute device; and

predicting, based on the first operating information, a time-to-ready (TTR) value that indicates an amount of time the data storage device will be at an operational state following a power loss recovery of the data storage device.

8. The method of claim 7 , further comprising:

determining whether the predicted TTR value meets a TTR requirement for bringing the data storage device to an operational state within a threshold time; and

causing a configuration change to the data storage device based on the predicted TTR value indicating that a time to bring the data storage device to the operational state exceeds the threshold time.

9. The method of claim 8 , further comprising:

obtain second operating information included in a second snapshot for the data storage device, the second snapshot associated with a second time interval during operation of the data storage device following the configuration change to the data storage device; and

predicting, based on the second operating information, a second TTR value that indicates a second amount of time the data storage device will be at an operational state following a power loss recovery of the data storage device.

10. The method of claim 8 , the data storage device comprises a solid state drive (SSD) including non-volatile memory, the configuration change to include increasing spare space in the non-volatile memory.

11. The method of claim 10 , predicting the TTR value based on summing a first sub-interval time for initializing hardware at a controller for the SSD, a second sub-interval time for discovery of the SSD by a compute device coupled with the SSD, a third sub-interval for a slow context load and a fourth sub-interval for a fast context load.

12. An apparatus comprising:

an interface to couple with a network; and

circuitry coupled with the interface, the circuitry to:

receive telemetry data via the interface, the telemetry data for multiple data storage devices that includes operating information included in separate snapshots for each data storage device from among the multiple data storage devices, the separate snapshots associated with a first time interval during operation of the multiple data storage devices;

determine individual time-to-ready (TTR) values for the multiple data storage devices based on the operating information, the individual TTR values to indicate an expected amount of time that a corresponding data storage device is to be at an operational state following a power loss recovery of the corresponding data storage devices; and

send via the interface the individual TTR values to the corresponding data storage devices.

13. The apparatus of claim 12 , further comprising the circuitry to:

use the individual TTR values to implement a staggered booting scheme that causes at least a first portion of the multiple data storage devices to be powered on first following the power loss recovery, the first portion of the multiple data storage devices having a first expected amount of time to be operational that is lower than a second expected amount of time to be operation for at least a second portion of the multiple data storage devices.

14. The apparatus of claim 13 , the multiple data storage devices comprise multiple solid state drives (SSDs) that includes non-volatile memory.

15. The apparatus of claim 14 , the circuitry to determine the individual TTR values comprises the circuitry to determine the individual TTR values for each SSD based on summing a first sub-interval time for initializing hardware at a controller for a respective SSD, a second sub-interval time for discovery of the respective SSD by a compute device, a third sub-interval for a slow context load at the respective SSD and a fourth sub-interval for a fast context load at the respective SSD.

16. A method comprising:

receiving telemetry data for multiple data storage devices that includes operating information included in separate snapshots for each data storage device from among the multiple data storage devices, the separate snapshots associated with a first time interval during operation of the multiple data storage devices;

determining individual time-to-ready (TTR) values for the multiple data storage devices based on the operating information, the individual TTR values to indicate an expected amount of time that a corresponding data storage device is to be at an operational state following a power loss recovery of the corresponding data storage devices; and

sending the individual TTR values to the corresponding data storage devices.

17. The method of claim 16 , further comprising:

using the individual TTR values to implement a staggered booting scheme that causes at least a first portion of the multiple data storage devices to be powered on first following the power loss recovery, the first portion of the multiple data storage devices having a first expected amount of time to be operational that is lower than a second expected amount of time to be operation for at least a second portion of the multiple data storage devices.

18. The method of claim 16 , the multiple data storage devices comprise multiple solid state drives (SSDs) including non-volatile memory.

19. The method of claim 18 , determining the individual TTR values comprises determining the individual TTR values for each SSD based on summing a first sub-interval time for initializing hardware at a controller for a respective SSD, a second sub-interval time for discovery of the respective SSD by a compute device coupled with the SSD, a third sub-interval for a slow context load at the respective SSD and a fourth sub-interval for a fast context load at the respective SSD.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2023
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP.
Reel/Frame 063815/0490 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 27, 2020
From: TARANGO, JOSEPH D.; BACA, JIM S.
To: INTEL CORPORATION
Reel/Frame 052241/0732 →
Continuity (1)
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