IP Library Granted Patent US 11,430,905
Granted Patent B1
US 11,430,905 · App. 16/834,130 · Granted Aug 30, 2022

Hetero-junction phototransistor

Inventors: Robert Kaliski (Boulder, CO); Robert G. Marshalek (Superior, CO)
Assignee: Ball Aerospace & Technologies Corp.
H01L31/1136H01L29/2003H01L29/66462H01L29/778H01L31/03048
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Quick Facts
Patent No.
US 11,430,905
App. No.
16/834,130
Granted
Aug 30, 2022
Kind
B1
Abstract

A hetero-junction phototransistor with a first layer comprising an InP N buffer and substrate, a second layer comprising an InGaAs N collector on the InP N buffer and substrate, a plurality of InGaAs P bases on the InGaAs N collector layer, and a plurality of InAIAs N emitters is described. Each emitter of the plurality of InAIAs N emitters is on a different base of the plurality of InGaAs P bases. The hetero-junction phototransistor comprises a plurality of InGaAs N+ caps, wherein each cap of the plurality of InGaAs N+ caps is on a different emitter of the plurality of InAIAs N emitters. The hetero-junction phototransistor comprises one or more electrical contacts. Each of the one or more electrical contacts is on a different cap of the plurality of InGaAs N+ caps.

Claims (25)

1. A hetero-junction phototransistor comprising:

a first layer comprising an N-type InP buffer and a substrate;

a second layer comprising a plurality of collectors, the plurality of collectors comprising an N-type InGaAs collector on the N-type InP buffer and the substrate;

a plurality of P-type InGaAs bases on the second layer;

a plurality of N-type InAlAs emitters, wherein each N-type InAlAs emitter of the plurality of N-type InAlAs emitters is on a different P-type InGaAs base of the plurality of P-type InGaAs bases;

a plurality of N + -type InGaAs caps, wherein each N + -type InGaAs cap of the plurality of N + -type InGaAs caps is on a different N-type InAlAs emitter of the plurality of N-type InAlAs emitters;

one or more electrical contacts, wherein each of the one or more electrical contacts is on a different N + -type InGaAs cap of the plurality of N + -type InGaAs caps,

wherein a plurality of superlattice bases and superlattice collectors are comprised by a different P-type InGaAs base of the plurality of P-type InGaAs bases and a different collector of the plurality of collectors; and

a silicon implantation region between a native oxide layer and the N-type InGaAs collector; wherein the silicon implantation region is between two of the plurality of P-type InGaAs bases.

2. The hetero-junction phototransistor of claim 1 , further comprising a Si 3 N 4 anti-reflection coating.

3. The hetero-junction phototransistor of claim 2 , wherein the Si 3 N 4 anti-reflection coating is in contact with the N-type InP buffer and the substrate.

4. The hetero-junction phototransistor of claim 1 , wherein each of the plurality of N-type InAlAs emitters are separated by a native oxide.

5. The hetero-junction phototransistor of claim 1 , wherein the electrical contacts comprise one or more of Ti, Pt, and Au.

6. A hetero junction phototransistor comprising:

a first layer comprising an N-type InP buffer and a substrate;

a second layer comprising a plurality of collectors on the N-type InP buffer and the substrate, wherein the plurality of collectors comprises one or more of an N-type InGaAs collector and an N-type InAlAs collector;

a plurality of bases on the plurality of collectors, wherein the plurality of bases comprises one or more of a P-type InGaAs base and a P-type InAlAs base;

a plurality of N-type InAlAs emitters, wherein each N-type InAlAs emitter of the plurality of N-type InAlAs emitters is on a different base of the plurality of bases;

a plurality of N + -type InGaAs caps, wherein each N + -type InGaAs cap of the plurality of N + -type InGaAs caps is on a different N-type InAlAs emitter of the plurality of N + -type InAlAs emitters; and

one or more electrical contacts, wherein each of the one or more electrical contacts is on a different N + -type InGaAs cap of the plurality of N + -type InGaAs caps,

wherein a plurality of superlattice bases and superlattice collectors are comprised by a different base of the plurality of bases and a different collector of the plurality of collectors, wherein each of the plurality of N-type InAlAs emitters are separated by a native oxide, wherein the electrical contacts are separated by silicon nitride.

7. The hetero-junction phototransistor of claim 6 , further comprising a Si 3 N 4 anti-reflective coating.

8. The heterojunction phototransistor of claim 7 , wherein the Si 3 N 4 anti-reflective coating is in contact with the N-type InP buffer and the substrate.

9. The hetero-junction phototransistor of claim 6 , wherein each of the superlattice bases and superlattice collectors are separated by an InGaAlAs intermixed region.

10. The hetero-junction phototransistor of claim 6 , wherein the electrical contacts comprise one or more of Ti, Pt, and Au.

Assignments (2)
CHANGE OF NAME Recorded Apr 17, 2024
From: BALL AEROSPACE & TECHNOLOGIES CORP.
To: BAE SYSTEMS SPACE & MISSION SYSTEMS INC.
Reel/Frame 067134/0901 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2020
From: KALISKI, ROBERT; MARSHALEK, ROBERT G.
To: BALL AEROSPACE & TECHNOLOGIES CORP.
Reel/Frame 052563/0681 →
Continuity (1)
Provisional Application 62826440 · Mar 29, 2019