LATERAL MOSCAP PHASE ADJUSTER
A MOSCAP phase adjuster includes two conductive regions with a thin insulating region therebetween, where charge is accumulated or depleted. In conventional MOSCAP modulators, the conductive and insulating regions are superposed layers, extending horizontally parallel to the substrate, which limits waveguide design and mode confinement, resulting in reduced phase shift performance. An improved MOSCAP phase adjuster and method of fabricating a MOSCAP phase adjuster includes depositing the material for the second conductive region beside and over top of the first conductive region after oxidation, and selectively etching the material to form the second conductive region.
1 . A method of fabricating a phase adjuster device comprising:
providing a substrate with a device layer, comprising a first material thereon;
etching the device layer to form a first conductive region, a first contact region, and an opening on the substrate;
forming an insulator layer on a vertical side of the first conductive region;
depositing a second material in the opening;
etching the second material to form a second conductive region and a second contact region;
doping the first conductive region with a first doping material at a first doping concentration;
doping the first contact region with the first doping material at a second doping concentration, higher than the first doping concentration;
doping the second conductive region with a second doping material at a third doping concentration; and
doping the second contact region with the second doping material at a fourth doping concentration, higher than the third doping concentration;
wherein the step of depositing the second material in the opening includes depositing the second material over the first conductive region forming a rounded transition section on top of the second conductive region; and
wherein etching the second material comprises etching the rounded transition section to form a raised spacer portion extending from the first conductive region adjacent the insulator layer.
2 . The method according to claim 1 , wherein the step of etching the second material further comprises etching the rounded transition section to form an arm over top of the first conductive region.
3 . The method according to claim 2 , wherein the arm extends completely across the first conductive region.
4 . The method according to claim 2 , wherein the step of forming the insulator layer comprising oxidizing the vertical side and horizontal top of the first conductive region.
5 . The method according to claim 2 , wherein the arm extends at least ½ across the first conductive region.
6 . The method according to claim 2 , wherein the arm extends at least ¾ across the first conductive region.
7 . The method according to claim 1 , wherein the step of forming the insulator layer comprising oxidizing the vertical side of the first conductive region.
8 . The method according to claim 1 , wherein the step of etching the second material also comprises: masking a first portion of the rounded transition section to define the raised spacer portion and the first conductive region, and performing a first etch to remove the second material above the first conductive region.
9 . The method according to claim 8 , wherein the step of etching the second material also comprises: masking the first and second conductive regions and the first contact region to define the second contact region; and performing a second etch to form the second contact region.
10 . The method according to claim 2 , wherein the step of etching the second material also comprises: masking a first portion of the rounded transition section to define the raised spacer portion and the arm over the first conductive region, and performing a first etch to remove the second material above the first contact region.
11 . The method according to claim 1 , wherein the second material comprises a metal or metal-like material.
12 . The method according to claim 1 , wherein the second material comprises poly-silicon.
13 . The method according to claim 1 , wherein the step of doping the second contact region includes gradually increasing a doping concentration from the second conductive region to an outer end of the second contact region.
14 . The method according to claim 1 , wherein the insulator layer is from 5 nm to 20 nm wide.
15 . The method according to claim 1 , wherein the insulator layer is about 10 nm wide.
16 . The method according to claim 1 , wherein the insulator layer comprises a dielectric.
17 . The method according to claim 1 , wherein the insulator layer comprises a same material as the substrate.
18 . The method according to claim 1 , wherein the insulator layer comprises one or a combination of silicon dioxide, silicon nitride, and hafnium oxide.
19 . The method according to claim 1 , wherein the first conductive region and the second conductive region form a ridge waveguide structure.
20 . The method according to claim 1 , wherein the step of depositing the second material in the opening includes depositing the second material over the first contact region.