IP Library Granted Patent US 11,587,485
Granted Patent B2
US 11,587,485 · App. 16/838,994 · Granted Feb 21, 2023

Display panel, method for driving the same, and display device

Inventors: Yana Gao (Shanghai, CN); Xingyao Zhou (Shanghai, CN); Yue Li (Shanghai, CN); Xinzhao Liu (Shanghai, CN)
Assignees: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.; WUHAN TIANMA MICROELECTRONICS CO., LTD. SHANGHAI BRANCH
G09G3/20G09G2310/0297G09G2320/0233
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Quick Facts
Patent No.
US 11,587,485
App. No.
16/838,994
Granted
Feb 21, 2023
Kind
B2
Abstract

A display panel and a display device are provided. The display panel has a display area and a non-display area. The display panel includes pixels arranged in H columns and H*x data lines arranged in the display area and DEMUX circuits arranged in the non-display area. Each pixel includes x sub-pixels, and the data line is electrically connected to the sub-pixel. Each DEMUX circuit includes signal output terminals electrically connected to the data lines. The DEMUX circuits include M first DEMUX circuits and N second DEMUX circuits. Each first DEMUX circuit includes a first signal input terminal and al first signal output terminals. Each second DEMUX circuit includes a second signal input terminal and b1 second signal output terminals. H*x=M*a1+N*b1, where H, x, M, N, a1, and b1 are positive integers, M>N, a1>2, b1≥2, a1>b1, and (M+N) is an even number.

Claims (69)

1. A display panel, comprising:

a display area and a non-display area;

pixels arranged in H columns in the display area, each of the pixels comprising x sub-pixels;

H*x data lines arranged in the display area and electrically connected to the sub-pixels of the pixels;

a plurality of DEMUX circuits arranged in the non-display area, each of the plurality of DEMUX circuits comprising signal output terminals, each of the signal output terminals being electrically connected to one of the H*x data lines, and the display panel comprising exactly H*x data lines; and

a1 control signal lines arranged in the non-display area,

wherein the plurality of DEMUX circuits comprises M first DEMUX circuits and N second DEMUX circuits, wherein each of the M first DEMUX circuits comprises a first signal input terminal and a1 first signal output terminals, wherein each of the N second DEMUX circuits comprises a second signal input terminal and b1 second signal output terminals, one of the M first DEMUX circuits shares one of the a1 control signal lines with one of the N second DEMUX circuits, and the display panel comprises exactly M+N DEMUX circuits;

where H*x=M*a1+N*b1, where H, x, M, N, a1, and b1 are positive integers, M>N, a1>2, b1≥2, a1>b1, and (M+N) is an even number;

wherein each of the M first DEMUX circuits comprises a1 first switches, wherein input terminals of the a1 first switches are electrically connected to the first signal input terminal, an output terminal of each of the a1 first switches is electrically connected to one of the a1 first signal output terminals, and control terminals of the a1 first switches are electrically connected to the a1 control signal lines respectively, and

wherein each of the N second DEMUX circuits comprises b1 second switches, wherein input terminals of the b1 second switches are electrically connected to the second signal input terminal, wherein an output terminal of each of the b1 second switches is electrically connected to one of the b1 second signal output terminals, and wherein control terminals of the b1 second switches are electrically connected to b1 control signal lines of the a1 control signal lines respectively.

2. The display panel according to claim 1 , wherein the plurality of DEMUX circuits is sequentially arranged as a 1 st DEMUX circuit to a (M+N) th DEMUX circuit; and

the N second DEMUX circuits comprise the 1 st DEMUX circuit to an n1 th DEMUX circuit of the plurality of DEMUX circuits that are sequentially arranged, and a (M+N−n2) th DEMUX circuit to the (M+N) th DEMUX circuit of the plurality of DEMUX circuits that are sequentially arranged, where n1+n2=N and both n1 and n2 are positive integers.

3. The display panel according to claim 2 , wherein N is an even number, and n1=n2.

4. The display panel according to claim 1 , wherein the plurality of DEMUX circuits is sequentially arranged as a 1 st DEMUX circuit to a (M+N) th DEMUX circuit; and the N second DEMUX circuits comprise the 1 st DEMUX circuit to an N th DEMUX circuit of the plurality of DEMUX circuits that are sequentially arranged or a (M+1) th DEMUX circuit to the (M+N) th DEMUX circuit of the plurality of DEMUX circuits are sequentially arranged.

5. The display panel according to claim 4 , wherein N=1.

6. The display panel according to claim 1 , wherein each second DEMUX circuit of the N second DEMUX circuits comprises c1 dummy switches, wherein input terminals of the c1 dummy switches are electrically connected to the second signal input terminal, wherein control terminals of the c1 dummy switches are electrically connected to c1 control signal lines of the a1 control signal lines respectively, where c1 is a positive integer, and c1=a1−b1.

7. The display panel according to claim 6 , further comprising:

dummy sub-pixels arranged in c1*N columns; and

c1*N dummy data lines;

wherein the c1*N dummy data lines are electrically connected to the dummy sub-pixels, and an output terminal of each of the c1 dummy switches is electrically connected to one of the c1*N dummy data lines.

8. The display panel according to claim 6 , wherein an output terminal of each of the c1 dummy switches is floating.

9. The display panel according to claim 1 , wherein if a remainder of (H*x)/a1 is an odd number, then N=1; and if the remainder of (H*x)/a1 is an even number, then N=1 or N=2.

10. The display panel according to claim 2 , further comprising:

a1 control signal lines arranged in the non-display area;

wherein each of the M first DEMUX circuits comprises a1 first switches, wherein input terminals of the a1 first switches are electrically connected to the first signal input terminal, wherein an output terminal of each of the a1 first switches are electrically connected to one of the a1 first signal output terminals, and wherein control terminals of the a1 first switches are electrically connected to the a1 control signal lines respectively;

wherein each of the N second DEMUX circuits comprises b1 second switches, wherein input terminals of the b1 second switches are electrically connected to the second signal input terminal, wherein an output terminal of each of the b1 second switches are electrically connected to one of the b1 second signal output terminals, and wherein control terminals of the b1 second switches are electrically connected to the b1 control signal lines of the a1 control signal lines respectively;

wherein a 1 st control signal line to an a1 th control signal line of the a1 control signal lines sequentially receive a clock signal during a frame;

wherein the control terminals of the b1 second switches of each of the 1 st DEMUX circuit to the n1 th DEMUX circuit of the plurality of DEMUX circuits are electrically connected to a (a1−b1) th control signal line to an a1 th control signal line of the a1 control signal lines; and

wherein the control terminals of the b1 second switches of each of the (M+N−n2) th DEMUX circuit to the (M+N) th DEMUX circuit of the plurality of DEMUX circuits are electrically connected to a 1 st control signal line to a b1 th control signal line of the a1 control signal lines.

11. The display panel according to claim 4 , further comprising:

a1 control signal lines arranged in the non-display area,

wherein each of the M first DEMUX circuits comprises a1 first switches, wherein input terminals of the a1 first switches are electrically connected to the first signal input terminal, wherein an output terminal of each of the a1 first switches is electrically connected to one of the a1 first signal output terminals, and wherein control terminals of the a1 first switches are electrically connected to the a1 control signal lines respectively;

wherein each of the N second DEMUX circuits comprises b1 second switches, wherein input terminals of the b1 second switches are electrically connected to the second signal input terminal, wherein an output terminal of each of the b1 second switches is electrically connected to one of the b1 second signal output terminals, and wherein control terminals of the b1 second switches are electrically connected to the b1 control signal lines of the a1 control signal lines respectively;

wherein a 1 st control signal line to an a1 th control signal line of the a1 control signal lines sequentially receive a clock signal during a frame;

wherein the control terminals of the b1 second switches of the 1 st DEMUX circuit to the N th DEMUX circuit of the plurality of DEMUX circuits are electrically connected to a (a1−b1) th control signal line to an a1 th control signal line of the a1 control signal lines; or

wherein the control terminals of the b1 second switches of the (M+1) th DEMUX circuit to the (M+N) th DEMUX circuit of the plurality of DEMUX circuits are electrically connected to a control signal line to a b1 th control signal line of the a1 control signal lines.

12. The display panel according to claim 1 , wherein the non-display area further comprises a binding area; and

wherein the display panel comprises:

a plurality of pads arranged in the binding area, wherein both the first signal input terminal and the second signal input terminal are electrically connected to the plurality of pads.

13. A method for driving a display panel, wherein the display panel comprises:

a display area and a non-display area;

pixels arranged in H columns in the display area, wherein each of the pixels comprising x sub-pixels;

H*x data lines arranged in the display area and electrically connected to the sub-pixels of the pixels; and

a plurality of DEMUX circuits arranged in the non-display area, each of the plurality of DEMUX circuits comprising signal output terminals, each of the signal output terminals being electrically connected to one of the H*x data lines, and the display panel comprising exactly H*x data lines; and

a1 control signal lines arranged in the non-display area;

wherein the plurality of DEMUX circuits comprises M first DEMUX circuits and N second DEMUX circuits, each of the M first DEMUX circuits comprising a first signal input terminal and a1 first signal output terminals, and wherein each of the N second DEMUX circuits comprises a second signal input terminal and b1 second signal output terminals, one of the M first DEMUX circuits shares one of the a1 control signal lines with one of the N second DEMUX circuits, and the display panel comprises exactly M+N DEMUX circuits;

where H*x=M*a1+N*b1, where H, x, M, N, a1, and b1 are positive integers, M>N, a1>2, b1≥2, a1>b1, and (M+N) is an even number;

wherein each of the M first DEMUX circuits comprises a1 first switches, wherein input terminals of the a1 first switches are electrically connected to the first signal input terminal, wherein an output terminal of each of the a1 first switches are electrically connected to one of the a1 first signal output terminals, and wherein control terminals of the a1 first switches are electrically connected to the a1 control signal lines respectively;

wherein each of the N second DEMUX circuits comprises b1 second switches, wherein input terminals of the b1 second switches being electrically connected to the second signal input terminal, wherein an output terminal of each of the b1 second switches is electrically connected to one of the b1 second signal output terminals, and wherein control terminals of the b1 second switches being electrically connected to b1 control signal lines of the a1 control signal lines respectively;

wherein each second DEMUX circuit of the N second DEMUX circuits comprises c1 dummy switches, wherein input terminals of the c1 dummy switches are electrically connected to the second signal input terminal, wherein control terminals of the c1 dummy switches are electrically connected to c1 control signal lines of the a1 control signal lines respectively, where c1 is a positive integer, and c1=a1−b1; and

wherein the method for driving a display panel comprises:

sequentially providing a first electrical signal to the a1 control signal lines during a frame, wherein the first electrical signal controls turning on the a1 first switches, the b1 second switches, and the c1 dummy switches;

providing a data signal to the first signal input terminal when one of the a1 first switches is turned on;

providing a data signal to the second signal input terminal when one of the b1 second switches is turned on; and

providing a data signal at a previous moment or a high-voltage signal to the second signal input terminal when one of the c1 dummy switches is turned on.

14. A display device comprising a display panel, wherein the display panel comprises:

a display area and a non-display area;

pixels arranged in H columns in the display area, each of the pixels comprising x sub-pixels;

H*x data lines arranged in the display area and electrically connected to the sub-pixels of the pixels;

a plurality of DEMUX circuits arranged in the non-display area, each of the plurality of DEMUX circuits comprising signal output terminals, each of the signal output terminals being electrically connected to one of the H*x data lines, and the display panel comprising exactly H*x data lines,

a1 control signal lines arranged in the non-display area;

wherein the plurality of DEMUX circuits comprises M first DEMUX circuits and N second DEMUX circuits, each of the M first DEMUX circuits comprising a first signal input terminal and a1 first signal output terminals, and wherein each of the N second DEMUX circuits comprises a second signal input terminal and b1 second signal output, one of the M first DEMUX circuits shares one of the a1 control signal lines with one of the N second DEMUX circuits, and the display panel comprises exactly M+N DEMUX circuits;

where H*x=M*a1+N*b1, where H, x, M, N, a1, and b1 are positive integers, M>N, a1>2, b1≥2, a1>b1, and (M+N) is an even number;

wherein each of the M first DEMUX circuits comprises a1 first switches, wherein input terminals of the a1 first switches are electrically connected to the first signal input terminal, wherein an output terminal of each of the a1 first switches is electrically connected to one of the a1 first signal output terminals, and wherein control terminals of the a1 first switches are electrically connected to the a1 control signal lines respectively, and

wherein each of the N second DEMUX circuits comprises b1 second switches, wherein input terminals of the b1 second switches are electrically connected to the second signal input terminal, wherein an output terminal of each of the b1 second switches are electrically connected to one of the b1 second signal output terminals, and wherein control terminals of the b1 second switches are electrically connected to b1 control signal lines of the a1 control signal lines respectively.

15. The display device according to claim 14 , wherein the plurality of DEMUX circuits is sequentially arranged as a 1 st DEMUX circuit to a (M+N) th DEMUX circuit; and

the N second DEMUX circuits comprise the 1 st DEMUX circuit to an n1 th DEMUX circuit of the plurality of DEMUX circuits that are sequentially arranged, and a (M+N−n2) th DEMUX circuit to the (M+N) th DEMUX circuit of the plurality of DEMUX circuits that are sequentially arranged, where n1+n2=N and both n1 and n2 are positive integers.

16. The display device according to claim 14 , wherein the plurality of DEMUX circuits is sequentially arranged as a 1 st DEMUX circuit to a (M+N) th DEMUX circuit; and the N second DEMUX circuits comprise the 1 st DEMUX circuit to an N th DEMUX circuit of the plurality of DEMUX circuits that are sequentially arranged or a (M+1) th DEMUX circuit to the (M+N) th DEMUX circuit of the plurality of DEMUX circuits are sequentially arranged.

17. The display device according to claim 14 , wherein each second DEMUX circuit of the N second DEMUX circuits comprises c1 dummy switches, wherein input terminals of the c1 dummy switches are electrically connected to the second signal input terminal, control terminals of the c1 dummy switches being electrically connected to c1 control signal lines of the a1 control signal lines respectively, where c1 is a positive integer, and c1=a1−b1.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2022
From: SHANGHAI TIANMA AM-OLED CO.,LTD.
To: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.; WUHAN TIANMA MICROELECTRONICS CO., LTD. SHANGHAI BRANCH
Reel/Frame 059498/0307 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2020
From: GAO, YANA; ZHOU, XINGYAO; LI, YUE; LIU, XINZHAO
To: SHANGHAI TIANMA AM-OLED CO., LTD.
Reel/Frame 052416/0098 →
Priority Claims (1)
CN 201911399728.5 · Dec 30, 2019 · national
Continuity (1)
Related Publication 20210201730A1 · Jul 1, 2021