IP Library Granted Patent US 11,513,855
Granted Patent B2
US 11,513,855 · App. 16/842,757 · Granted Nov 29, 2022

System and method for allocating central processing unit (CPU) cores for system operations

Inventors: Jian Gao (Beijing, CN); Vamsi K. Vankamamidi (Hopkinton, MA); Hongpo Gao (Beijing, CN); Jamin Kang (Beijing, CN)
Assignee: EMC IP Holding Company, LLC
G06F9/5027G06F2209/5012
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Quick Facts
Patent No.
US 11,513,855
App. No.
16/842,757
Granted
Nov 29, 2022
Kind
B2
Abstract

A method, computer program product, and computing system for allocating a first set of cores of a plurality of cores of a multicore central processing unit (CPU) for processing host input-output (IO) operations of a plurality of operations on a storage system. A second set of cores of the plurality of cores may be allocated for processing flush operations of the plurality of operations on the storage system. A third set of cores of the plurality of cores may be allocated for processing rebuild operations of the plurality of operations on the storage system. At least one of one or more host IO operations, one or more rebuild operations, and one or more flush operations may be processed, via the plurality of cores and based upon, at least in part, the allocation of the plurality of cores for processing the plurality of operations.

Claims (37)

1. A computer-implemented method, executed on a computing device, comprising:

allocating, using the computing device, a first set of cores of a plurality of cores of a multicore central processing unit (CPU) for executing one or more host input-output (IO) operations of a plurality of operations on a storage system, wherein a number of cores of the first set of cores is based upon, at least in part, a minimum threshold IO operations per second (IOPS) of the storage system;

allocating, using the computing device, a second set of cores of the plurality of cores for executing one or more flush operations of the plurality of operations on the storage system;

allocating, using the computing device, a third set of cores of the plurality of cores for executing one or more rebuild operations of the plurality of operations on the storage system;

executing the plurality of operations using the plurality of cores and based upon, at least in part, the allocation of the first, the second, and the third set of cores of the plurality of cores, wherein the plurality of operations comprises: the one or more host IO operations, the one or more rebuild operations, and the one or more flush operations; and

balancing, using the computing device, allocation of the plurality of operations across the plurality of cores to improve a rebuild rate of the storage system compared to a threshold rebuild rate and to minimize an impact on the one or more host IO operations caused by the one or more rebuild operations,

wherein allocation of the one or more flush operations is balanced with allocation of the one or more host IO operations and the one or more rebuild operations by allocating the second set of cores of the plurality of cores for executing the one or more flush operations on the storage system such that the second set of cores is a subset of the first set of cores, and

wherein allocation of the one or more rebuild operations is balanced with allocation of the one or more host IO operations and the one or more flush operations by allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations on the storage system such that the third set of cores is a subset of the first set of cores.

2. The computer-implemented method of claim 1 , wherein allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations of the plurality of operations on the storage system includes allocating each core of the second set of cores and at least one additional core from the first set of cores of the plurality of cores for executing the one or more rebuild operations.

3. The computer-implemented method of claim 1 , wherein allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations of the plurality of operations on the storage system includes allocating only the second set of cores for executing the one or more rebuild operations in addition to executing the one or more flush operations.

4. The computer-implemented method of claim 1 , wherein allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations of the plurality of operations on the storage system includes allocating only cores of the first set of cores of the plurality of cores that are not allocated as a portion of the second set of cores for executing the one or more flush operations.

5. The computer-implemented method of claim 1 , wherein allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations includes allocating cores from the first set of cores of the plurality of cores for executing the one or more rebuild operations based upon, at least in part, the threshold rebuild rate.

6. A computer program product residing on a non-transitory computer readable medium having a plurality of instructions stored thereon which, when executed by a processor, cause the processor to perform operations comprising:

allocating a first set of cores of a plurality of cores of a multicore central processing unit (CPU) for executing one or more host input-output (IO) operations of a plurality of operations on a storage system, wherein a number of cores of the first set of cores is based upon, at least in part, a minimum threshold IO operations per second (IOPS) of the storage system;

allocating a second set of cores of the plurality of cores for executing one or more flush operations of the plurality of operations on the storage system;

allocating a third set of cores of the plurality of cores for executing one or more rebuild operations of the plurality of operations on the storage system;

executing the plurality of operations using the plurality of cores and based upon, at least in part, the allocation of the first, the second, and the third set of cores of the plurality of cores, wherein the plurality of operations comprises: the one or more host IO operations, the one or more rebuild operations, and the one or more flush operations; and

balancing allocation of the plurality of operations across the plurality of cores to improve a rebuild rate of the storage system compared to a threshold rebuild rate and to minimize an impact on the one or more host IO operations caused by the one or more rebuild operations,

wherein allocation of the one or more flush operations is balanced with allocation of the one or more host IO operations and the one or more rebuild operations by allocating the second set of cores of the plurality of cores for executing the one or more flush operations on the storage system such that the second set of cores is a subset of the first set of cores, and

wherein allocation of the one or more rebuild operations is balanced with allocation of the one or more host IO operations and the one or more flush operations by allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations on the storage system such that the third set of cores is a subset of the first set of cores.

7. The computer program product of claim 6 , wherein allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations of the plurality of operations on the storage system includes allocating each core of the second set of cores and at least one additional core from the first set of cores of the plurality of cores the plurality of cores for executing the one or more rebuild operations.

8. The computer program product of claim 6 , wherein allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations of the plurality of operations on the storage system includes allocating only the second set of cores for executing the one or more rebuild operations in addition to executing the one or more flush operations.

9. The computer program product of claim 6 , wherein allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations of the plurality of operations on the storage system includes allocating only cores of the first set of cores of the plurality of cores that are not allocated as a portion of the second set of cores for executing the one or more flush operations.

10. The computer program product of claim 6 , wherein allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations includes allocating cores from the first set of cores of the plurality of cores for executing the one or more rebuild operations based upon, at least in part, the threshold rebuild rate.

11. A computing system comprising:

at least one memory architecture; and

at least one processor configured to allocate a first set of cores of a plurality of cores of a multicore central processing unit (CPU) for executing one or more host input-output (IO) operations of a plurality of operations on a storage system, wherein a number of cores of the first set of cores is based upon, at least in part, a minimum threshold IO operations per second (IOPS) of the storage system,

wherein the processor is further configured to allocate a second set of cores of the plurality of cores for executing one or more flush operations of the plurality of operations on the storage system,

wherein the processor is further configured to allocate a third set of cores of the plurality of cores for executing one or more rebuild operations of the plurality of operations on the storage system,

wherein the processor is further configured to execute the plurality of operations using the plurality of cores and based upon, at least in part, the allocation of the first, the second, and the third set of cores of the plurality of cores, wherein the plurality of operations comprises: the one or more host IO operations, the one or more rebuild operations, and the one or more flush operations,

wherein the processor is further configured to balance allocation of the plurality of operations across the plurality of cores to improve a rebuild rate of the storage system compared to a threshold rebuild rate and to minimize an impact on the one or more host IO operations caused by the one or more rebuild operations,

wherein allocation of the one or more flush operations is balanced with allocation of the one or more host IO operations and the one or more rebuild operations by allocating the second set of cores of the plurality of cores for executing the one or more flush operations on the storage system such that the second set of cores is a subset of the first set of cores, and

wherein allocation of the one or more rebuild operations is balanced with allocation of the one or more host IO operations and the one or more flush operations by allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations on the storage system such that the third set of cores is a subset of the first set of cores.

12. The computing system of claim 11 , wherein allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations of the plurality of operations on the storage system includes allocating each core of the second set of cores and at least one additional core from the first set of cores of the plurality of cores for executing the one or more rebuild operations.

13. The computing system of claim 11 , wherein allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations of the plurality of operations on the storage system includes allocating only the second set of cores for executing the one or more rebuild operations in addition to executing the one or more flush operations.

14. The computing system of claim 11 , wherein allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations of the plurality of operations on the storage system includes allocating only cores of the first set of cores of the plurality of cores that are not allocated as a portion of the second set of cores for executing the one or more flush operations.

15. The computing system of claim 11 , wherein allocating the third set of cores of the plurality of cores for executing the one or more rebuild operations includes allocating cores from the first set of cores of the plurality of cores for executing the one or more rebuild operations based upon, at least in part, the threshold rebuild rate.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052851/0917) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0509 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052851/0081) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0441 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052852/0022) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0582 →
RELEASE OF SECURITY INTEREST AT REEL 052771 FRAME 0906 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0298 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052852/0022 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC; THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052851/0081 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052851/0917 →
SECURITY AGREEMENT Recorded May 28, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 052771/0906 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2020
From: GAO, JIAN; VANKAMAMIDI, VAMSI K; GAO, HONGPO; KANG, JAMIN
To: EMC IP HOLDING COMPANY, LLC
Reel/Frame 052352/0047 →
Continuity (1)
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