IP Library Granted Patent US 11,250,753
Granted Patent B2
US 11,250,753 · App. 16/850,447 · Granted Feb 15, 2022

EMI mitigation by shifted source line pre-charge

Inventor: Daisuke Ito (Tokyo, JP)
Assignee: Synaptics Incorporated
G09G3/20G09G2310/0251G09G2310/0297G09G2320/0223G09G2330/06
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Quick Facts
Patent No.
US 11,250,753
App. No.
16/850,447
Granted
Feb 15, 2022
Kind
B2
Abstract

A method of driving pixels of a display device includes, for a set of N pixels of the display device that are connected to a switch, each of the N pixels to be driven during a time period T, applying, to a first pixel of the set, a first pre-charge signal, and applying, in sequence, to each remaining pixel of the set, a corresponding pre-charge signal, such that the start of the pre-charge signal for a Kth pixel is delayed by a time Δtk, from the start of the pre-charge signal for the (K−1)th pixel.

Claims (42)

1. A method of driving pixels of a display device, comprising:

for a set of N pixels of the display device that are connected to a switch, each of the N pixels to be driven during a time period T:

applying, to a first pixel of the set of N pixels, a first pre-charge signal; and

applying, in sequence, to each remaining pixel of the set of N pixels, a corresponding pre-charge signal, such that a start of a pre-charge signal for a Kth pixel is delayed by a time Δtk, from a start of a pre-charge signal for the (K−1)th pixel;

applying, to each pixel of the set of N pixels, a pixel driving signal, wherein the first pre-charge signal, the corresponding pre-charge signal, and the pixel driving signal are voltage pulses.

2. The method of claim 1 , wherein N pre-charge signals have the same duration in time.

3. The method of claim 1 , wherein a plurality of pixels of the set of N pixels each include a MOSFET, and each of the first pre-charge signal, the corresponding pre-charge signal, and the pixel driving signal are applied to a source input of the MOSFET.

4. The method of claim 1 , wherein at least one of:

the time Δtk is different for two or more pixels in the set of N pixels; or

two or more of N pre-charge signals have different durations in time.

5. The method of claim 1 , wherein the time Δtk is the same for each remaining pixel.

6. The method of claim 1 , wherein the time Δtk for the Kth pixel is less than the duration of the pre-charge signal for the (K−1)th pixel.

7. The method of claim 1 , wherein the time period T is a horizontal refresh period of the display device.

8. The method of claim 1 , wherein a time period for two or more pre-charge signals overlap.

9. A display device, comprising:

a display panel including a plurality of pixels;

a gate driver, configured to enable the plurality of pixels;

a display driver coupled, via a multiplexing switch, to each pixel of the plurality of pixels; and

a processor, coupled to the gate driver and the display driver, configured to control:

the gate driver, to enable the plurality of pixels; and

the display driver, to:

apply, to a first pixel of the plurality of pixels, a first pre-charge signal; and

apply, in sequence, to each of remaining pixels of the plurality of pixels, a corresponding pre-charge signal, such a start of a pre-charge signal for a Kth pixel of the plurality of pixels is delayed by a time Δtk from a start of a pre-charge signal for the (K−1)th pixel of the plurality of pixels;

apply, to each pixel of the plurality of pixels, a pixel driving signal, wherein the first pre-charge signal, the corresponding pre-charge signal, and the pixel driving signal are voltage pulses.

10. The display device of claim 9 , wherein the time Δtk is shorter than a duration of the pre-charge signal for the (K−1)th pixel.

11. The display device of claim 9 , wherein pre-charge signals for pixels in a row all have the same duration in time.

12. The display device of claim 9 , wherein each pixel of a row includes a MOSFET, and wherein the display driver is further configured to apply each pre-charge signal and each pixel driving signal to a source input of the MOSFET.

13. The display device of claim 9 , wherein the time Δtk is the same for each of the plurality of pixels in a row.

14. The display device of claim 9 , wherein the processor is further configured to apply a pixel signal to each pixel in a row.

15. The display device of claim 9 , wherein the processor is further configured to apply the first pre-charge signal and a first pixel driving signal as one contiguous signal.

16. The display device of claim 9 , wherein a time period for two or more pre-charge signals overlap.

17. A method for driving a set of pixels of a display device, comprising:

setting, within a pre-defined period of the display device, a pre-charge signal to be followed by a pixel driving signal for each pixel in the set of pixels;

setting the pre-charge signal for a first pixel of the set of pixels at a beginning of the pre-defined period;

for each remaining pixel in the set of pixels, staggering a beginning of each corresponding pre-charge signal so that there is a minimum delay between any two pre-charge signals;

driving the set of pixels during one or more pre-defined periods;

measuring a level of electromagnetic interference (EMI) generated when driving the set of pixels; and

in response to determining that a value for the EMI does not meet a maximum EMI level, recursively:

increasing the minimum delay;

measuring a further level of EMI generated by driving the set of pixels with the increased minimum delay until the further level of EMI is less than the maximum EMI level.

18. The method of claim 17 , wherein the set of pixels is an ordered set, and further comprising staggering a beginning of each successive pixel's pre-charge signal so that it is delayed by the minimum delay from a pre-charge signal of its immediately prior pixel in the ordered set.

19. The method of claim 17 , wherein a time period for two or more pre-charge signals overlap.

Assignments (2)
SECURITY INTEREST Recorded Mar 12, 2021
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 055581/0737 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2020
From: ITO, DAISUKE
To: SYNAPTICS INCORPORATED
Reel/Frame 052418/0715 →