IP Library Granted Patent US 12,045,351
Granted Patent B2
US 12,045,351 · App. 16/857,518 · Granted Jul 23, 2024

System and method of authenticating firmware

Inventors: Jeffrey Leighton Kennedy (Austin, TX); Milton Olavo Taveira (Round Rock, TX)
Assignee: Dell Products L.P.
G06F21/572G06F13/36G06F21/575G06F21/76H04L9/30H04L9/3236H04L9/3247G06F2221/033
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Quick Facts
Patent No.
US 12,045,351
App. No.
16/857,518
Granted
Jul 23, 2024
Kind
B2
Abstract

In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may: receive firmware of an integrated circuit (IC) of an information handling system; receive a digital signature of the firmware, where the digital signature includes an encrypted hash value, encrypted with a private encryption key; determine a first hash value of the firmware; decrypt the encrypted hash value, via a public encryption key associated with the private encryption key, to obtain a second hash value; determine if the first hash value matches the second hash value; if so, permit the information handling system to boot an operating system; and if not, prevent, by the authentication device, the information handling system from booting the operating system.

Claims (91)

1. A computer system, comprising:

at least one processor; and

a first memory medium, coupled to the at least one processor, that stores an operating system and at least one application executable by the at least one processor;

an integrated circuit (IC) that includes a second memory medium, different from the first memory medium, which stores firmware of the IC and a digital signature of the firmware; and

an authentication device;

wherein the authentication device is configured to:

access the second memory medium to obtain the firmware;

receive the firmware from the second memory medium;

access the second memory medium to obtain the digital signature of the firmware, wherein the digital signature includes an encrypted hash value, encrypted via an asymmetric encryption process with a private encryption key;

receive the digital signature of the firmware from the second memory medium;

determine a first hash value of the firmware;

decrypt the encrypted hash value, via the asymmetric encryption process with a public encryption key associated with the private encryption key, to obtain a second hash value;

determine if the first hash value matches the second hash value;

if the first hash value matches the second hash value, permit the computer system to boot the operating system; and

if the first hash value does not match the second hash value, i) prevent the computer system from booting the operating system, and ii) install new firmware, differing from the previously stored firmware, at the second memory medium.

2. The computer system of claim 1 , wherein the authentication device includes the at least one processor, a platform controller hub of the computer system, a baseboard management controller of the computer system, or a microcontroller of the computer system.

3. The computer system of claim 2 ,

wherein the authentication device includes the baseboard management controller or the microcontroller; and

wherein the baseboard management controller or the microcontroller stores the public encryption key.

4. The computer system of claim 2 , further comprising:

a non-volatile memory medium;

wherein the non-volatile memory medium stores the public encryption key;

wherein the authentication device includes the at least one processor or the platform controller hub; and

wherein the authentication device is further configured to:

access the non-volatile memory medium to obtain the public encryption key; and

receive the public encryption key from the non-volatile memory medium.

5. The computer system of claim 1 , wherein the IC includes a complex programmable logic device (CPLD).

6. The computer system of claim 1 ,

further comprising a bus shared with at least one component of the computer system other than the IC and the authentication device;

wherein the bus includes an inter-integrated circuit (I 2 C) bus, a serial peripheral interface (SPI) bus, a low pin count (LPC) bus, an enhanced serial peripheral interface (eSPI) bus, a universal serial bus (USB), or a system management bus (SMBus); and

wherein, to receive the firmware of the IC, the authentication device is further configured to receive the firmware via the bus.

7. The computer system of claim 1 ,

further comprising a bus shared with at least one component of the computer system other than the IC and the authentication device;

wherein the bus includes an inter-integrated circuit (I 2 C) bus, a serial peripheral interface (SPI) bus, a low pin count (LPC) bus, an enhanced serial peripheral interface (eSPI) bus, a universal serial bus (USB), or a system management bus (SMBus); and

wherein, to receive the digital signature, the authentication device is further configured to receive the digital signature via the bus.

8. A method, comprising:

accessing, by an authentication device of a computer system, a first memory medium of an integrated circuit (IC) of the computer system to obtain firmware of the IC;

receiving, by the authentication device, the firmware of the IC from the first memory medium;

accessing, by the authentication device, the first memory medium to obtain a digital signature of the firmware, wherein the digital signature includes an encrypted hash value, encrypted via an asymmetric encryption process with a private encryption key;

receiving, by the authentication device, the digital signature of the firmware from the first memory medium;

determining, by the authentication device, a first hash value of the firmware;

decrypting, by the authentication device, the encrypted hash value, via the asymmetric encryption process with a public encryption key associated with the private encryption key, to obtain a second hash value;

determining, by the authentication device, if the first hash value matches the second hash value;

if the first hash value matches the second hash value, permitting, by the authentication device, the computer system to boot an operating system stored via a second memory medium of the computer system, different from the first memory medium; and

if the first hash value does not match the second hash value, i) preventing, by the authentication device, the computer system from booting the operating system, and ii) installing new firmware, differing from the previously stored firmware, at the second memory medium.

9. The method of claim 8 , wherein the authentication device includes a processor of the computer system, a platform controller hub of the computer system, a baseboard management controller of the computer system, or a microcontroller of the computer system.

10. The method of claim 9 ,

wherein the authentication device includes the baseboard management controller or the microcontroller; and

wherein the baseboard management controller or the microcontroller stores the public encryption key.

11. The method of claim 9 ,

wherein a non-volatile memory medium of the computer system stores the public encryption key; and

wherein the authentication device includes the processor or the platform controller hub;

the method further comprising:

accessing, by the authentication device, the non-volatile memory medium of the computer system to obtain the public encryption key; and

receiving, by the authentication device, the public encryption key from the non- volatile memory medium of the computer system.

12. The method of claim 8 , wherein the IC includes a complex programmable logic device (CPLD).

13. The method of claim 8 ,

wherein the receiving the firmware of the IC includes receiving the firmware via a bus shared with at least one component of the computer system other than the IC and the authentication device;

wherein the bus includes an inter-integrated circuit (I 2 C) bus, a serial peripheral interface (SPI) bus, a low pin count (LPC) bus, an enhanced serial peripheral interface (eSPI) bus, a universal serial bus (USB), or a system management bus (SMBus).

14. The method of claim 8 ,

wherein the receiving the digital signature includes receiving the digital signature via a bus shared with at least one component of the computer system other than the IC and the authentication device;

wherein the bus includes an inter-integrated circuit (I 2 C) bus, a serial peripheral interface (SPI) bus, a low pin count (LPC) bus, an enhanced serial peripheral interface (eSPI) bus, a universal serial bus (USB), or a system management bus (SMBus).

15. An authentication device of a computer system, comprising:

a processor; and

a first memory medium, coupled to the processor, that stores instructions executable by the processor, which when executed by the processor, cause the authentication device to:

access a second memory medium of an integrated circuit (IC) of the computer system, to obtain firmware of the IC;

receive the firmware from the second memory medium;

access the second memory medium of the IC to obtain a digital signature of the firmware, wherein the digital signature includes an encrypted hash value, encrypted via an asymmetric encryption process with a private encryption key;

receive the digital signature of the firmware from the second memory medium;

determine a first hash value of the firmware;

decrypt the encrypted hash value, via the asymmetric encryption process with a public encryption key associated with the private encryption key, to obtain a second hash value;

if the first hash value matches the second hash value, permit the computer system to boot an operating system stored via a third memory medium of the computer system, different from the first memory medium; and

if the first hash value does not match the second hash value, i) prevent the computer system from booting the operating system, and ii) install new firmware, differing from the previously stored firmware, at the second memory medium.

16. The authentication device of claim 15 ,

wherein the authentication device includes a baseboard management controller or a microcontroller; and

wherein the baseboard management controller or the microcontroller stores the public encryption key.

17. The authentication device of claim 16 ,

wherein a non-volatile memory medium of the computer system stores the public encryption key; and

wherein the processor of the authentication device includes a processor of the computer system or a platform controller hub of the computer system;

wherein the authentication device is further configured to:

access the non-volatile memory medium to obtain the public encryption key; and

receive the public encryption key from the non-volatile memory medium.

18. The authentication device of claim 15 , wherein the IC includes a complex programmable logic device (CPLD).

19. The authentication device of claim 15 ,

further comprising a bus shared with at least one component of the computer system other than the IC and the authentication device;

wherein the bus includes an inter-integrated circuit (I 2 C) bus, a serial peripheral interface (SPI) bus, a low pin count (LPC) bus, an enhanced serial peripheral interface (eSPI) bus, a universal serial bus (USB), or a system management bus (SMBus); and

wherein, to receive the firmware of the IC, the authentication device is further configured to receive the firmware via the bus.

20. The authentication device of claim 15 ,

further comprising a bus shared with at least one component of the computer system other than the IC and the authentication device;

wherein the bus includes an inter-integrated circuit (I 2 C) bus, a serial peripheral interface (SPI) bus, a low pin count (LPC) bus, an enhanced serial peripheral interface (eSPI) bus, a universal serial bus (USB), or a system management bus (SMBus); and

wherein, to receive the digital signature, the authentication device is further configured to receive the digital signature via the bus.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052851/0081) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0441 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052851/0917) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0509 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052852/0022) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0582 →
RELEASE OF SECURITY INTEREST AT REEL 052771 FRAME 0906 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0298 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052852/0022 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC; THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052851/0081 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052851/0917 →
SECURITY AGREEMENT Recorded May 28, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 052771/0906 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2020
From: KENNEDY, JEFFREY LEIGHTON; TAVEIRA, MILTON OLAVO
To: DELL PRODUCTS L.P.
Reel/Frame 052486/0942 →