IP Library Granted Patent US 11,138,141
Granted Patent B1
US 11,138,141 · App. 16/861,021 · Granted Oct 5, 2021

System to enable display detect and method therefor

Inventor: Eric Sendelbach (Austin, TX)
Assignee: Dell Products L.P.
G06F13/4081G06T1/20
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Quick Facts
Patent No.
US 11,138,141
App. No.
16/861,021
Granted
Oct 5, 2021
Kind
B1
Abstract

A method may include executing basic input/output system (BIOS) instructions to initialize an information handling system. The initialization may include generating a hot-plug detect (HPD) override request. The method may further include receiving the HPD override request at a general purpose input/output (GPIO) device. In response to receiving the HPD override request, the GPIO may assert an active-low signal at an interconnect electrically connected to a HPD terminal of a graphics display receptacle, the receptacle for coupling a graphics processing unit to a graphics display device.

Claims (30)

1. An information handling system comprising:

a display receptacle to couple the information handling system to a graphics display device, the receptacle including a hot-plug detect (HPD) terminal configured to receive an HPD signal from the graphics display device;

a general purpose input/output (GPIO) device, an output of the GPIO device electrically coupled to the HPD terminal; and

a central processing unit (CPU) to execute basic input/output system (BIOS) instructions, the BIOS instructions to configure the GPIO to assert an active-low signal at an interconnect electrically connected to the HPD terminal.

2. The information handling system of claim 1 , further comprising an embedded controller (EC), and wherein the GPIO is included at the EC.

3. The information handling system of claim 1 , further comprising a chipset functionally coupled to the CPU, and wherein the GPIO is included at the chipset.

4. The information handling system of claim 1 , further comprising an integrated graphics processing unit (GPU), the integrated GPU coupled to the display receptacle.

5. The information handling system of claim 1 , further comprising a BIOS configuration setup interface, the interface including an option to enable and disable configuring the GPIO to assert the active-low signal.

6. The information handling system of claim 1 , wherein the display receptacle is a Display Port receptacle.

7. The information handling system of claim 1 , wherein the display receptacle is a High-Definition Multimedia Interface receptacle.

8. The information handling system of claim 1 , wherein the GPIO is configured to discontinue the assertion of the active-low signal prior to handing control of the information handling system to an operating system.

9. The information handling system of claim 1 , wherein the GPIO is configured to discontinue the assertion of the active-low signal after the BIOS transfers control of the information handling system to an operating system.

10. A method comprising:

executing basic input/output system (BIOS) instructions to initialize an information handling system, the initialization including generating a hot-plug detect (HPD) override request;

receiving the HPD override request at a general purpose input/output (GPIO) device; and

in response to receiving the HPD override request, asserting an active-low signal at an interconnect electrically connected to an HPD terminal of a graphics display receptacle, the receptacle for coupling a graphics processing unit to a graphics display device.

11. The method of claim 10 , wherein the GPIO is included at an embedded controller.

12. The method of claim 10 , wherein the GPIO is included at a chipset.

13. The method of claim 10 , wherein the display receptacle is coupled to an integrated graphics processing unit included at the information handling system.

14. The method of claim 10 , wherein the information handling system provides a BIOS configuration setup interface, the interface including an option to enable and disable configuring the GPIO to assert the active-low signal.

15. The method of claim 10 , wherein the GPIO is configured to discontinue the assertion of the active-low signal prior to handing control of the information handling system to an operating system.

16. The method of claim 10 , wherein the GPIO is configured to discontinue the assertion of the active-low signal after the BIOS transfers control of the information handling system to an operating system.

17. A circuit board comprising:

a graphics processing unit (GPU);

a display receptacle to couple the GPU to a graphics display device, the receptacle including a hot-plug detect (HPD) terminal configured to receive an HPD signal from the graphics display device;

a general purpose input/output (GPIO) device, an output of the GPIO device electrically coupled to the HPD terminal; and

a central processing unit to execute basic input/output system (BIOS) instructions, the BIOS instructions to configure the GPIO to assert an active-low signal at an interconnect electrically connected to the HPD terminal.

18. The circuit board of claim 17 , further comprising an embedded controller (EC), wherein the GPIO is included at the EC.

19. The circuit board of claim 17 , further comprising a chipset functionally coupled to a central processing unit, wherein the GPIO is included at the chipset.

20. The circuit board of claim 17 , wherein the GPU is an integrated GPU permanently installed at the circuit board.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052851/0081) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0441 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052851/0917) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0509 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052852/0022) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0582 →
RELEASE OF SECURITY INTEREST AT REEL 052771 FRAME 0906 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0298 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052852/0022 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC; THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052851/0081 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052851/0917 →
SECURITY AGREEMENT Recorded May 28, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 052771/0906 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 28, 2020
From: SENDELBACH, ERIC
To: DELL PRODUCTS, LP
Reel/Frame 052517/0109 →