IP Library Granted Patent US 10,931,200
Granted Patent B2
US 10,931,200 · App. 16/865,008 · Granted Feb 23, 2021

Current detection FET and resonant converter using the FET

Inventors: Thomas Ribarich (Laguna Beach, CA); Daniel Marvin Kinzer (El Segundo, CA); Tao Liu (San Marino, CA); Marco Giandalia (Marina Del Rey, CA); Victor Sinow (Fresno, CA)
Assignee: Navitas Semiconductor Limited
H02M3/1584H02M1/0061G05F1/573G05F3/26G05F3/262H02M3/158H02M3/1588H02M2001/0058
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Quick Facts
Patent No.
US 10,931,200
App. No.
16/865,008
Granted
Feb 23, 2021
Kind
B2
Abstract

A current detecting GaN FET is disclosed. The current detecting GaN FET includes a first GaN switch having a first gate, a first drain, a first source, and a first field plate. The current detecting GaN FET also includes a second GaN switch having a second gate, a second drain, a second source, and a second field plate. The current detecting GaN FET also includes a resistor. The first and second gates are electrically connected, the first and second drains are electrically connected, and the resistor is connected between the first and second sources.

Claims (30)

1. A current sensing circuit, comprising:

a substrate comprising GaN;

a first GaN-based switch on the substrate, wherein the first GaN-based switch comprises a first drain, a first gate, and a first source; and

a second GaN-based switch on the substrate, wherein the second GaN-based switch comprises a second drain, a second gate, and a second source,

wherein a ratio of a current through the first GaN-based switch to a current through the second GaN-based switch is substantially equal to a ratio of a width divided by length of the first GaN-based switch to a width divided by length of the second GaN-based switch, and

wherein the first drain is electrically connected to the second drain, and wherein the first gate is electrically connected to the second gate.

2. The current sensing circuit of claim 1 , further comprising a resistive element connected to the first source and connected to the second source.

3. The current sensing circuit of claim 1 , wherein the first GaN-based switch comprises a first field plate, and wherein the second GaN-based switch comprises a second field plate.

4. The current sensing circuit of claim 3 , wherein the first field plate is electrically connected to the second field plate.

5. The current sensing circuit of claim 4 , wherein the first field plate and the second field plate are electrically connected to the second source.

6. The current sensing circuit of claim 1 , further comprising a switch driver having an output connected to the first and second gates.

7. The current sensing circuit of claim 6 , further comprising a digital circuit having an output connected to an input of the switch driver.

8. The current sensing circuit of claim 7 , wherein the digital circuit comprises a control circuit.

9. The current sensing circuit of claim 1 , further comprising an amplifier having an input connected to the second source.

10. The current sensing circuit of claim 9 , wherein the amplifier comprises:

an operational transconductance amplifier (OTA), having an input connected to the second source; and

a resistive element connected to an output of the OTA.

11. The current sensing circuit of claim 9 , wherein the amplifier comprises an output connected to an analog input of a control circuit.

12. The current sensing circuit of claim 11 , wherein the control circuit has an output connected to an input of a switch driver having an output connected to the first and second gates.

13. The current sensing circuit of claim 1 , wherein the first GaN-based switch has a width divided by length which is greater than a width divided by length of the second GaN-based switch.

14. A method of sensing current with a current sensing circuit, the current sensing circuit comprising: a first GaN-based switch comprising a first drain, a first gate, and a first source; a second GaN-based switch comprising a second drain, a second gate, and a second source, wherein the first drain is electrically connected to the second drain, wherein the first gate is electrically connected to the second gate, and wherein the method comprises:

conducting current through the first GaN-based switch; and

conducting current through the second GaN-based switch,

wherein a ratio of a current through the first GaN-based switch to a current through the second GaN-based switch is substantially equal to a ratio of a width divided by length of the first GaN-based switch to a width divided by length of the second GaN-based switch.

15. The method of claim 14 , wherein the first GaN-based switch has a width divided by length which is greater than a width divided by length of the second GaN-based switch.

16. The method of claim 14 , wherein the current sensing circuit further comprises a resistive element connected to the first source and connected to the second source, and the method further comprises conducting current from the second source through the resistive element to the first source.

17. The method of claim 14 , wherein the first GaN-based switch comprises a first field plate, and wherein the second GaN-based switch comprises a second field plate.

18. The method of claim 17 , wherein the first field plate is electrically connected to the second field plate.

19. The method of claim 14 , wherein the current sensing circuit further comprises a switch driver having an output connected to the first and second gates, and the method further comprises, with the switch driver, causing the first GaN-based switch and the second GaN-based switch to selectively conduct.

20. The method of claim 19 , wherein the current sensing circuit further comprises a control circuit having an output connected to an input of the switch driver, wherein the method further comprises, with the control circuit, causing the first GaN-based switch and the second GaN-based switch to selectively conduct.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNMENT DOCUMENTS AND THE RECEIVING PARTY'S POSTAL CODE PREVIOUSLY RECORDED AT REEL: 053864 FRAME: 0208. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 9, 2021
From: NAVITAS SEMICONDUCTOR, INC.
To: NAVITAS SEMICONDUCTOR LIMITED
Reel/Frame 056758/0314 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2020
From: NAVITAS SEMICONDUCTOR, INC.
To: NAVITAS SEMICONDUCTOR LIMITED
Reel/Frame 053864/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2020
From: RIBARICH, THOMAS; KINZER, DANIEL MARVIN; GIANDALIA, MARCO; LIU, TAO; SINOW, VICTOR
To: NAVITAS SEMICONDUCTOR, INC.
Reel/Frame 052563/0673 →
Continuity (3)
Continuation 16378529 · Apr 8, 2019
Continuation 16190794 · Nov 14, 2018
Related Publication 20200328682A1 · Oct 15, 2020