IP Library Granted Patent US 11,258,539
Granted Patent B2
US 11,258,539 · App. 16/867,638 · Granted Feb 22, 2022

Technologies for performing encoding of data symbols for column read operations

Inventors: Wei Wu (Portland, OR); Sourabh Dongaonkar (Santa Clara, CA); Jawad Khan (Portland, OR)
Assignee: Intel Corporation
H04L1/0064H03M13/1102H04L1/0041H04L1/0071H04L1/0643
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Quick Facts
Patent No.
US 11,258,539
App. No.
16/867,638
Granted
Feb 22, 2022
Kind
B2
Abstract

Technologies for performing encoding of data symbols for column read operations include a device having a memory that is column addressable and circuitry connected to the memory. The circuitry is configured to obtain a data set to encode. The data set is defined by a set of data symbols. The circuitry is also configured to determine a set of codewords to encode the data symbols of the data set, including defining each codeword with a set bit distance of at least two from every other codeword in the set of codewords. Additionally, the circuitry is configured to write the data set to the memory as a function of the determined set of codewords.

Claims (46)

1. A device comprising:

a memory that is column addressable;

circuitry connected to the memory, wherein the circuitry is to:

obtain a data set to encode, wherein the data set is defined by a set of data symbols;

determine a set of codewords to encode the data symbols of the data set, including defining each codeword with a set bit distance of at least two from every other codeword in the set of codewords;

write the data set to the memory as a function of a determined set of codewords;

determine a frequency of use of each data symbol in the data set; and

define the set bit distance between the codewords as a function of the frequency of use of each corresponding data symbol in the data set.

2. The device of claim 1 , wherein to define the set bit distance between the codewords as a function of the frequency of use comprises to define the set bit distance between the codewords in a direct relationship to the frequency of use of each corresponding data symbol in the data set.

3. The device of claim 1 , wherein to determine a set of codewords to encode the data symbols comprises to associate at least one unique set bit with each data symbol represented in the set of codewords.

4. The device of claim 1 , wherein to determine a set of codewords to encode the data symbols comprises to concatenate each codeword with itself.

5. The device of claim 1 , wherein the circuitry is further to write, to the memory, a map that correlates each data symbol with a corresponding codeword from the determined set of codewords.

6. The device of claim 1 , wherein to write the data set to the memory as a function of the determined set of codewords comprises to write, to the memory, a corresponding codeword for each data symbol present in the data set.

7. The device of claim 1 , wherein to write the data set to the memory as a function of the determined set of codewords comprises to write, to the memory, the data set as records of a database.

8. The device of claim 1 , wherein to obtain the data set comprises to obtain a data set defined by data symbols in an alphabet.

9. The device of claim 1 , wherein to obtain the data set comprises to obtain a data set defined by data symbols in an alphanumeric set.

10. The device of claim 1 , wherein to obtain the data set comprises to obtain a data set defined by American Standard Code for Information Interchange (ASCII) data symbols.

11. The device of claim 1 , wherein to obtain the data set comprises to obtain data indicative of a genetic sequence.

12. The device of claim 1 , wherein to obtain the data set comprises to obtain data indicative of textual data.

13. The device of claim 1 , wherein the circuitry is further to:

read codeword data from selected columns of the memory; and

convert the read codewords to corresponding data symbols as a function of a map that correlates each data symbol with a corresponding codeword.

14. The device of claim 1 , wherein the memory is column addressable and row addressable and has a three dimensional cross point architecture.

15. A system comprising:

a processor;

a memory that is column addressable;

circuitry connected to the memory, wherein the circuitry is to:

obtain a data set to encode, wherein the data set is defined by a set of data symbols;

determine a set of codewords to encode the data symbols of the data set, including defining each codeword with a set bit distance of at least two from every other codeword in the set of codewords; and

write the data set to the memory as a function of a determined set of codewords;

determine a frequency of use of each data symbol in the data set; and

define the set bit distance between the codewords as a function of the frequency of use of each corresponding data symbol in the data set.

16. The system of claim 15 , wherein the circuitry is in a memory device.

17. The system of claim 15 , wherein the circuitry is in a storage device.

18. A method comprising:

obtaining, by a device having a memory that is column addressable, a data set to encode, wherein the data set is defined by a set of data symbols;

determining, by the device, a set of codewords to encode the data symbols of the data set, including defining each codeword with a set bit distance of at least two from every other codeword in the set of codewords;

writing, by the device, the data set to the memory as a function of a determined set of codewords;

determining a frequency of use of each data symbol in the data set; and

defining the set bit distance between the codewords as a function of the frequency of use of each corresponding data symbol in the data set.

19. One or more non-transitory machine-readable storage media comprising a plurality of instructions stored thereon that, in response to being executed, cause a device having a memory that is column addressable to:

obtain a data set to encode, wherein the data set is defined by a set of data symbols;

determine a set of codewords to encode the data symbols of the data set, including defining each codeword with a set bit distance of at least two from every other codeword in the set of codewords;

write the data set to the memory as a function of a determined set of codewords;

determine a frequency of use of each data symbol in the data set; and

define the set bit distance between the codewords as a function of the frequency of use of each corresponding data symbol in the data set.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072914/0491 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 27, 2020
From: WU, WEI; DONGAONKAR, SOURABH; KHAN, JAWAD
To: INTEL CORPORATION
Reel/Frame 054186/0602 →
Continuity (1)
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