IP Library Granted Patent US 11,543,853
Granted Patent B2
US 11,543,853 · App. 16/871,103 · Granted Jan 3, 2023

Pulse counting apparatus operating at low power and operation method thereof

Inventors: Hee Jun Kim (Yongin-si, KR); Eun Suk Park (Seongnam-si, KR)
Assignee: Dialog Semiconductor Korea Inc.
G06F1/14G06F1/3206G06F9/4403
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Quick Facts
Patent No.
US 11,543,853
App. No.
16/871,103
Granted
Jan 3, 2023
Kind
B2
Abstract

A pulse counting apparatus operating at a low power and an operation method thereof are provided. The pulse counting apparatus includes a pulse counter configured to count a number of pulses inputted from outside of the pulse counting apparatus and generate an interrupt signal; a timer unit configured to generate a wake-up signal according to a preset time; a real time clock (RTC) configured to serve as a clock of the pulse counter and the timer unit; and a processor configured to switch from a sleep mode to an active mode when the interrupt signal or the wake-up signal is generated.

Claims (40)

1. A pulse counting apparatus comprising:

a pulse counter configured to count a number of pulses inputted from outside of the pulse counting apparatus and generate an interrupt signal;

a timer unit configured to generate a wake-up signal according to a preset time;

a real time clock (RTC) configured to serve as a clock of the pulse counter and the timer unit;

a processor configured to switch from a sleep mode to an active mode when the interrupt signal or the wake-up signal is generated, and

a communication unit configured to communicate to both the processor and a network,

wherein the processor compares a current count value comprised of the number of accumulated pulses of the pulse counter, with a previous count value transmitted to an external device that is connected to the communication unit, and transmits the current count value to the external device through the communication unit when the current count value is not equal to the previous count value.

2. The pulse counting apparatus as claimed in claim 1 , wherein the sleep mode is a mode in which the pulse counter, the timer unit, and the RTC operate.

3. The pulse counting apparatus as claimed in claim 2 , wherein the processor switches from the sleep mode to the active mode only by the interrupt signal when a period of the pulses is longer than a predetermined value.

4. The pulse counting apparatus as claimed in claim 2 , further comprising:

an oscillator configured to have a maximum operating frequency higher than the RTC,

wherein the processor selects the RTC or the oscillator as a clock of the pulse counter according to a frequency of the pulses.

5. The pulse counting apparatus as claimed in claim 1 , wherein the interrupt signal is generated according to the current count value of the pulse counter.

6. A pulse counting apparatus comprising:

a pulse counter configured to count a number of pulses inputted from outside of the pulse counting apparatus and generate an interrupt signal;

a timer unit configured to generate a wake-up signal according to a preset time;

a real time clock (RTC) configured to serve as a clock of the pulse counter and the timer unit;

a processor configured to switch from a sleep mode to an active mode when the interrupt signal or the wake-up signal is generated, and

a communication unit configured to communicate to both the processor and a network,

wherein the processor compares a current count value comprised of the number of accumulated pulses of the pulse counter with a previous count value transmitted to an external device that is disconnected from the communication unit, when the current count value is equal to the previous count value, executes a full boot code, reconnects the external device to the communication unit, and transmits the current count value to the external device through the communication unit.

7. A method for operating a pulse counting apparatus, comprising:

counting a number of pulses inputted from outside of the pulse counting apparatus and generating an interrupt signal according to an interrupt signal generation condition;

generating a wake-up signal according to a preset time;

switching a processor from a sleep mode to an active mode when the interrupt signal or the wake-up signal is generated; and

comparing a current count value comprised of the number of accumulated pulses of the pulse counter with a previous count value transmitted to an external device that is connected to the pulse counting apparatus,

wherein a power of the processor is off in the sleep mode,

when the current count value is not equal to the previous count value, transmitting the current count value to the external device, setting the preset time, and switching the processor from the active mode to the sleep mode; and

when the current count value is equal to the previous count value, setting the interrupt signal generation condition and switching the processor from the active mode to the sleep mode.

8. The method as claimed in claim 7 , wherein the interrupt signal is generated according to the current count value of the pulse counter.

9. The method as claimed in claim 7 , further comprising:

selecting the RTC or the oscillator as a clock of the pulse counting apparatus according to a frequency of the pulses.

10. The method as claimed in claim 7 , wherein the processor is switched from the sleep mode to the active mode only by the interrupt signal when a period of the pulses is longer than a predetermined value.

11. A method for operating a pulse counting apparatus, comprising:

counting a number of pulses inputted from outside of the pulse counting apparatus and generating an interrupt signal according to an interrupt signal generation condition;

generating a wake-up signal according to a preset time;

switching a processor from a sleep mode to an active mode when the interrupt signal or the wake-up signal is generated; and

comparing a current count value comprised of the number of accumulated pulses of the pulse counter with a previous count value transmitted to an external device that is disconnected from the pulse counting apparatus,

wherein a power of the processor is off in the sleep mode,

when the current count value is not equal to the previous count value, setting the preset time and switching the processor from the active mode to the sleep mode; and

when the current count value is equal to the previous count value, executing a full boot code, transmitting the current count value to the external device that is reconnected to the pulse counting apparatus, setting the interrupt signal generation condition, and switching the processor from the active mode to the sleep mode.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2026
From: RENESAS DESIGN KOREA INC.
To: RENESAS ELECTRONIC AMERICA INC.
Reel/Frame 074176/0251 →
CHANGE OF NAME Recorded Nov 8, 2025
From: DIALOG SEMICONDUCTOR KOREA INC.
To: RENESAS DESIGN KOREA INC.
Reel/Frame 073513/0861 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 4, 2020
From: KIM, HEE JUN; PARK, EUN SUK
To: DIALOG SEMICONDUCTOR KOREA INC.
Reel/Frame 052833/0837 →
Priority Claims (1)
KR 10-2019-0055491 · May 13, 2019 · national
Continuity (1)
Related Publication 20200363834A1 · Nov 19, 2020