IP Library › Granted Patent US 11,424,209
Granted Patent B2
US 11,424,209 · App. 16/871,325 · Granted Aug 23, 2022

Wafer level package structure with internal conductive layer

Inventors: Sven Albers (Regensburg, DE); Klaus Reingruber (Langquaid, DE); Georg Seidemann (Landshut, DE); Christian Geissler (Teugn, DE); Richard Patten (Langquaid, DE)
Assignee: Intel Corporation
H01L24/24H01L21/4857H01L21/561H01L21/568H01L23/3128H01L23/36H01L23/4334H01L23/49822H01L23/552H01L24/82H01L24/96H01L24/97H01L2224/24225H01L2224/24226H01L2224/82005H01L2224/9222H01L2224/97H01L2924/15311H01L2924/3025
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Quick Facts
Patent No.
US 11,424,209
App. No.
16/871,325
Granted
Aug 23, 2022
Kind
B2
Abstract

An apparatus is described that includes a redistribution layer and a semiconductor die on the redistribution layer. An electrically conductive layer resides over the semiconductor die. A compound mold resides over the electrically conductive layer.

Claims (26)

1. An apparatus, comprising:

a redistribution layer;

a semiconductor die on the redistribution layer, the semiconductor die having a contact structure on a side of the semiconductor die opposite the redistribution layer; and

an electrically conductive layer over the semiconductor die, the electrically conductive layer in direct electrical contact with the contact structure of the semiconductor die, the electrically conductive layer in contact with a sidewall of the semiconductor die, and the electrically conductive layer in direct electrical contact with the redistribution layer, the electrically conductive layer coupling the contact structure of the semiconductor die to the redistribution layer.

2. The apparatus of claim 1 , wherein the electrically conductive layer is comprised of a metal.

3. The apparatus of claim 2 , wherein the electrically conductive layer is comprised of a metal foil.

4. The apparatus of claim 1 , wherein the electrically conductive layer forms a heat spreader.

5. The apparatus of claim 1 , wherein the electrically conductive layer forms an EMI shield.

6. The apparatus of claim 1 , further comprising a mold layer over the electrically conductive layer, and a conductive via that extends from the electrically conductive layer through the mold layer to a top side metallization layer.

7. The apparatus of claim 6 , wherein the conductive via is over the semiconductor die.

8. The apparatus of claim 6 , wherein the conductive via is not over the semiconductor die but is over the redistribution layer.

9. The apparatus of claim 1 , wherein the electrically conductive layer comprises a plurality of features.

10. The apparatus of claim 9 , wherein a first one of the plurality of features is on the redistribution layer, and wherein a second one of the plurality of features is on the side of the semiconductor die opposite the redistribution layer.

11. An apparatus, comprising: a redistribution layer; a semiconductor die on the redistribution layer, the semiconductor die having a contact structure on a side of the semiconductor die opposite the redistribution layer; an electrically conductive layer over the semiconductor die, the electrically conductive layer in direct electrical contact with the contact structure of the semiconductor die, and the electrically conductive layer in contact with a sidewall of the semiconductor die; a mold layer over the electrically conductive layer and over the semiconductor die; and a conductive via vertically over the semiconductor die, the conductive via extending from the electrically conductive layer through the mold layer.

12. The apparatus of claim 11 , further comprising:

a top side metallization layer on the mold layer, wherein the conductive via extends from the electrically conductive layer to the top side metallization layer.

13. The apparatus of claim 12 , further comprising:

a second conductive via that is not over the semiconductor die, the second conductive via extending from the electrically conductive layer through the mold layer to the top side metallization layer.

14. The apparatus of claim 11 , further comprising:

a second conductive via that is not over the semiconductor die, the second conductive via extending from the electrically conductive layer through the mold layer.

15. The apparatus of claim 11 , wherein the electrically conductive layer comprises a plurality of features.

16. The apparatus of claim 15 , wherein a first one of the plurality of features is on the redistribution layer, and wherein a second one of the plurality of features is on the side of the semiconductor die opposite the redistribution layer.

17. The apparatus of claim 15 , wherein one of the plurality of features extends from the redistribution layer along a sidewall of the semiconductor die and to the side of the semiconductor die opposite the redistribution layer.

18. The apparatus of claim 11 , wherein the electrically conductive layer is comprised of a metal foil.

19. The apparatus of claim 11 , wherein the electrically conductive layer forms a heat spreader.

20. The apparatus of claim 11 , wherein the electrically conductive layer forms an EMI shield.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 057060/0431 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 057254/0415 →
Continuity (2)
Continuation 15776051
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