IP Library Granted Patent US 11,128,331
Granted Patent B2
US 11,128,331 · App. 16/879,745 · Granted Sep 21, 2021

Methods and systems for utilizing ultra-efficiency low noise configurations for phased array antennas

Inventors: Roman Rainov (Petah Tikva, IL); Uri Kanari (Tel-Aviv, IL); Natan Mizrahi (Giv'ataim, IL); Kobi Sturkovich (Netanya, IL)
Assignee: MaxLinear, Inc.
H04B1/16H01Q21/22
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Quick Facts
Patent No.
US 11,128,331
App. No.
16/879,745
Granted
Sep 21, 2021
Kind
B2
Abstract

Systems and methods are provided for utilizing ultra-efficiency low noise configurations for phased array antennas. Radio frequency integrated circuits (RFICs) may be used in phased array antennas to enable configuring large number of phase shifters in highly efficient manner, and to do so in optimal manner, such as with low noise.

Claims (42)

1. A system, comprising:

a phased array antenna comprising a plurality of antenna elements;

one or more radio frequency (RF) frontend circuits, wherein each of the one or more RF frontend circuits:

comprises a plurality of phase shifters; and

controls operation of a corresponding subset of the plurality of antenna elements based on one or more control signals; and

one or more control circuits for controlling the plurality of the RF frontend circuits during configuration of the plurality of antenna elements, wherein:

the one or more control circuits comprises a selector circuit that outputs the one or more control signals to the one or more RF frontend circuits, based on a selection control signal; and

the one or more control circuits comprises at least one signal adjusting circuit that adjust at least one input to the selector circuit, and wherein the at least one signal adjusting circuit comprises a digital-to-analog converter (DAC) circuit.

2. The system of claim 1 , wherein the radio frequency (RF) frontend circuits comprise radio frequency integrated circuit (RFIC) frontends.

3. The system of claim 1 , wherein the radio frequency (RF) frontend circuits are embedded into the phased array antenna.

4. A system, comprising:

a phased array antenna comprising a plurality of antenna elements;

one or more radio frequency (RF) frontend circuits, wherein each of the one or more RF frontend circuits:

comprises a plurality of phase shifters; and

controls operation of a corresponding subset of the plurality of antenna elements based on one or more control signals; and

one or more control circuits for controlling the plurality of the RF frontend circuits during configuration of the plurality of antenna elements, wherein:

the one or more control circuits comprises a setting circuit that sets the one or more control signals applied to each of the one or more RF frontend circuits;

the one or more control circuits comprises at least one signal adjusting circuit that adjust at least one input to the setting circuit; and

the at least one signal adjusting circuit comprises a digital-to-analog converter (DAC) circuit.

5. The system of claim 4 , wherein the radio frequency (RF) frontend circuits comprise radio frequency integrated circuit (RFIC) frontends.

6. The system of claim 4 , wherein the radio frequency (RF) frontend circuits are embedded into the phased array antenna.

7. A system, comprising:

a phased array antenna comprising a plurality of antenna elements;

one or more radio frequency (RF) frontend circuits, wherein each of the one or more RF frontend circuits:

comprises a plurality of phase shifters; and

controls operation of a corresponding subset of the plurality of antenna elements based on one or more control signals; and

one or more control circuits for controlling the plurality of the RF frontend circuits during configuration of the plurality of antenna elements;

wherein the one or more control circuits comprises a plurality of setting circuits, each of the plurality of setting circuits setting a particular control parameter for a respective one of the one or more RF frontend circuits; and

wherein the plurality of setting circuits comprise a plurality of digital-to-analog converter (DAC) circuits.

8. The system of claim 7 , wherein the radio frequency (RF) frontend circuits comprise radio frequency integrated circuit (RFIC) frontends.

9. The system of claim 7 , wherein the radio frequency (RF) frontend circuits are embedded into the phased array antenna.

10. A radio frequency integrated circuit (RFIC) frontend, comprising:

a plurality of phase shifter circuits, wherein each of the plurality of phase shifter circuits controls shifts of one or more corresponding antenna elements; and

one or more control circuits for controlling the plurality of phase shifter circuits based on one or more control signals, wherein:

the one or more control circuits comprises a single level holder circuit that sets one or more control parameters of a particular one of the plurality of phase shifter circuits, and

the single level holder circuit selects the particular one of the plurality of phase shifter circuits based on a selection control signal:

wherein the one or more control circuits comprises at least one signal adjusting circuit that adjust at least one of the one or more control signals, and wherein the at least one signal adjusting circuit comprises an analog-to-digital converter (ADC) circuit.

11. A radio frequency integrated circuit (RFIC) frontend, comprising:

a plurality of phase shifter circuits, wherein each of the plurality of phase shifter circuits controls shifts of one or more corresponding antenna elements; and

one or more control circuits for controlling the plurality of phase shifter circuits based on one or more control signals, wherein:

the one or more control circuits comprises at least one signal adjusting circuit that adjust at least one of the one or more control signals;

the at least one signal adjusting circuit comprises an analog-to-digital converter (ADC) circuit.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 13, 2021
From: RAINOV, ROMAN
To: MAXLINEAR, INC.
Reel/Frame 057176/0556 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 13, 2021
From: STURKOVICH, KOBI
To: MAXLINEAR, INC.
Reel/Frame 057184/0769 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 13, 2021
From: MIZRAHI, NATAN
To: MAXLINEAR, INC.
Reel/Frame 057184/0840 →
SECURITY AGREEMENT Recorded Jul 9, 2021
From: MAXLINEAR, INC.; MAXLINEAR COMMUNICATIONS, LLC; EXAR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 056816/0089 →