Method, device, and computer-readable storage medium for bitmap conversion
Techniques convert a first bitmap into a second bitmap. Such techniques involve determining a first plurality of bits in the first bitmap corresponding to a particular bit in the second bitmap; determining whether the first plurality of bits include a dirty bit as a unit of a processor line width; in response to determining that the first plurality of bits include a dirty bit, setting the particular bit as a dirty bit; and in response to determining that the first plurality of bits do not include a dirty bit, setting the particular bit as a non-dirty bit.
1. A method for converting a first bitmap into a second bitmap, comprising:
determining a first plurality of bits in the first bitmap corresponding to a particular bit in the second bitmap, wherein bits marked as dirty in the first bitmap and bits marked as dirty in the second bitmap indicate dirty blocks on a source array of a local mirror drive in a data storage system, wherein responsive to a restart of the source array after a crash of the source array, synchronization of data from the source array to a destination array is continued beginning at a location of dirty blocks on the source array indicated by a first dirty bit of the second bitmap;
determining whether the first plurality of bits include a dirty bit as a unit of a processor line width;
in response to determining that the first plurality of bits include a dirty bit, setting the particular bit as a dirty bit; and
in response to determining that the first plurality of bits do not include a dirty bit, setting the particular bit as a non-dirty bit.
2. The method of claim 1 , wherein determining whether the first plurality of bits include a dirty bit comprises:
in response to determining that the first plurality of bits are aligned with the processor line width, sequentially determining whether a second plurality of bits of the first plurality of bits corresponding to the processor line width include a dirty bit; and
in response to determining that the second plurality of bits include a dirty bit, determining that the first plurality of bits include a dirty bit.
3. The method of claim 1 , wherein determining whether the first plurality of bits include a dirty bit comprises:
in response to determining that the first plurality of bits are within one processor line width and at least one of a start bit and an end bit of the first plurality of bits is not aligned with the processor line width, reading a third plurality of bits including the first plurality of bits, the third plurality of bits being aligned with the processor line width;
extracting the first plurality of bits from the third plurality of bits by performing a bitwise AND operation with a mask corresponding to the at least one of the start bit and the end bit; and
determining whether the extracted first plurality of bits include a dirty bit.
4. The method of claim 1 , wherein determining whether the first plurality of bits includes a dirty bit comprises:
in response to determining that the first plurality of bits are not within the processor line width, determining whether a start bit of the first plurality of bits is aligned with the processor line width;
in response to determining that the start bit of the first plurality of bits is not aligned with the processor line width, reading a third plurality of bits including the start bit of the first plurality of bits, the third plurality of bits corresponding to the processor line width;
extracting a fourth plurality of bits from the third plurality of bits performing a bitwise AND operation with a mask corresponding to the start bit, the start bit of the fourth plurality of bits being the start bit of the first plurality of bits and an end bit of the fourth plurality of bits being aligned with the processor line width;
in response to determining that the fourth plurality of bits include a dirty bit, determining that the first plurality of bits include a dirty bit; and
sequentially determining whether the other bits of the first plurality of bits include a dirty bit as a unit of the processor line width.
5. The method of claim 4 , wherein determining whether the other bits include a dirty bit comprises:
determining whether an end bit of a fifth plurality of bits in the other bits that are within the processor line width is aligned with the processor line width;
in response to determining that the end bit of the fifth plurality of bits is not aligned with the processor line width, reading a sixth plurality of bits including the end bit of the fifth plurality of bits, the sixth plurality of bits corresponding to the processor line width;
extracting the fifth plurality of bits from the sixth plurality of bits by performing a bitwise AND operation with a mask corresponding to the end bit; and
in response to determining that the fifth plurality of bits include a dirty bit, determining that the first plurality of bits include a dirty bit.
6. The method of claim 1 , wherein the first bitmap is stored in a volatile memory and the second bitmap is stored in a non-volatile memory.
7. A device for converting a first bitmap into a second bitmap, comprising:
a processing unit;
a memory coupled to the processing unit and including instructions stored thereon, the instructions, when executed by the processing unit, causing the device to perform acts comprising:
determining a first plurality of bits in the first bitmap corresponding to a particular bit in the second bitmap, wherein bits marked as dirty in the first bitmap and bits marked as dirty in the second bitmap indicate dirty blocks on a source array of a local mirror drive in a data storage system, wherein responsive to a restart of the source array after a crash of the source array, synchronization of data from the source array to a destination array is continued beginning at a location of dirty blocks on the source array indicated by a first dirty bit of the second bitmap;
determining whether the first plurality of bits include a dirty bit as a unit of a processor line width;
in response to determining that the first plurality of bits include a dirty bit, setting the particular bit as a dirty bit; and
in response to determining that the first plurality of bits do not include a dirty bit, setting the particular bit as a non-dirty bit.
8. The device of claim 7 , wherein determining whether the first plurality of bits include a dirty bit comprises:
in response to determining that the first plurality of bits are aligned with the processor line width, sequentially determining whether a second plurality of bits of the first plurality of bits corresponding to the processor line width include a dirty bit; and
in response to determining that the second plurality of bits include a dirty bit, determining that the first plurality of bits include a dirty bit.
9. The device of claim 7 , wherein determining whether the first plurality of bits include a dirty bit comprises:
in response to determining that the first plurality of bits are within one processor line width and at least one of a start bit and an end bit of the first plurality of bits is not aligned with the processor line width, reading a third plurality of bits including the first plurality of bits, the third plurality of bits being aligned with the processor line width;
extracting the first plurality of bits from the third plurality of bits by performing a bitwise AND operation with a mask corresponding to the at least one of the start bit and the end bit; and
determining whether the extracted first plurality of bits include a dirty bit.
10. The device of claim 7 , wherein determining whether the first plurality of bits includes a dirty bit comprises:
in response to determining that the first plurality of bits are not within the processor line width, determining whether a start bit of the first plurality of bits is aligned with the processor line width;
in response to determining that the start bit of the first plurality of bits is not aligned with the processor line width, reading a third plurality of bits including the start bit of the first plurality of bits, the third plurality of bits corresponding to the processor line width;
extracting a fourth plurality of bits from the third plurality of bits performing a bitwise AND operation with a mask corresponding to the start bit, the start bit of the fourth plurality of bits being the start bit of the first plurality of bits and an end bit of the fourth plurality of bits being aligned with the processor line width;
in response to determining that the fourth plurality of bits include a dirty bit, determining that the first plurality of bits include a dirty bit; and
sequentially determining whether the other bits of the first plurality of bits include a dirty bit as a unit of the processor line width.
11. The device of claim 10 , wherein determining whether the other bits include a dirty bit comprises:
determining whether an end bit of a fifth plurality of bits in the other bits that are within the processor line width is aligned with the processor line width;
in response to determining that the end bit of the fifth plurality of bits is not aligned with the processor line width, reading a sixth plurality of bits including the end bit of the fifth plurality of bits, the sixth plurality of bits corresponding to the processor line width;
extracting the fifth plurality of bits from the sixth plurality of bits by performing a bitwise AND operation with a mask corresponding to the end bit; and
in response to determining that the fifth plurality of bits include a dirty bit, determining that the first plurality of bits include a dirty bit.
12. The device of claim 7 , wherein the first bitmap is stored in a volatile memory and the second bitmap is stored in a non-volatile memory.
13. A computer program product having a non-transitory computer readable medium which stores a set of instructions to convert a first bitmap into a second bitmap; the set of instructions, when carried out by computerized circuitry, causing the computerized circuitry to perform a method of:
determining a first plurality of bits in the first bitmap corresponding to a particular bit in the second bitmap, wherein bits marked as dirty in the first bitmap and bits marked as dirty in the second bitmap indicate dirty blocks on a source array of a local mirror drive in a data storage system, wherein responsive to a restart of the source array after a crash of the source array, synchronization of data from the source array to a destination array is continued beginning at a location of dirty blocks on the source array indicated by a first dirty bit of the second bitmap;
determining whether the first plurality of bits include a dirty bit as a unit of a processor line width;
in response to determining that the first plurality of bits include a dirty bit, setting the particular bit as a dirty bit; and
in response to determining that the first plurality of bits do not include a dirty bit, setting the particular bit as a non-dirty bit.
14. The method of claim 1 , further comprising:
marking bits as dirty in the second bitmap in response to write requests received from an application; and
additionally marking bits as dirty in the first bitmap in response to write requests received from the application while a transport channel between the local mirror drive and a remote mirror drive is broken.
15. The method of claim 14 , wherein each individual bit in the first bitmap corresponds to a first number of blocks in the source array of the local mirror drive in the data storage system;
wherein each individual bit in the second bitmap corresponds to a second number of blocks in the source array of the local mirror drive in the data storage system; and
wherein the second number of blocks is larger than the first number of blocks.
16. The method of claim 15 , further comprising starting to set bits in the first bitmap in response to write requests received from the application in response to detecting that the transport channel between the local mirror drive and the remote mirror drive is broken.
17. The method of claim 16 , further comprising, in response to detecting that the transport channel between the local mirror drive and the remote mirror drive is no longer broken, continuing synchronization of data from the source array to the destination array beginning at a location of dirty blocks in the source array indicated by a first dirty bit of the first bitmap.