HETEROGENEOUS IN-STORAGE COMPUTATION
A storage device. In some embodiments the storage device includes a storage controller; a nonvolatile memory device connected to the storage controller through a first physical interface, and a processing circuit. The processing circuit may be connected, through a second physical interface, to the storage controller or to the nonvolatile memory device, the second physical interface being the same as the first physical interface.
1 . A storage device, comprising:
a storage controller;
a nonvolatile memory device connected to the storage controller through a first physical interface; and
a processing circuit connected, through a second physical interface, to the storage controller or to the nonvolatile memory device,
the second physical interface being the same as the first physical interface.
2 . The storage device of claim 1 , wherein the nonvolatile memory device is configured to communicate with the storage controller utilizing a first protocol, and the processing circuit is configured to communicate with the storage controller utilizing the first protocol.
3 . The storage device of claim 2 , wherein the first protocol is Toggle or Open NAND Flash Interface (ONFI).
4 . The storage device of claim 1 , wherein the processing circuit is configured to support write commands sent to the processing circuit by the storage controller.
5 . The storage device of claim 1 , wherein the processing circuit is configured to support read commands sent to the processing circuit by the storage controller.
6 . The storage device of claim 1 , wherein the processing circuit comprises a buffer for temporary data storage.
7 . The storage device of claim 1 , wherein:
the processing circuit is a programmable processing circuit, and
the storage controller is configured to program the processing circuit.
8 . The storage device of claim 7 , wherein the processing circuit is a field programmable gate array.
9 . The storage device of claim 1 , wherein:
the storage controller is configured to write parameters to memory in the processing circuit; and
the processing circuit is configured to process data based on the parameters.
10 . The storage device of claim 1 , wherein the storage controller is configured to:
read data from the nonvolatile memory device,
write the data to the processing circuit.
11 . The storage device of claim 1 , wherein the processing circuit is configured to read data directly from the nonvolatile memory device.
12 . The storage device of claim 11 , wherein the storage controller is configured to write, to the processing circuit, an address, in the nonvolatile memory device, of data to be processed.
13 . The storage device of claim 11 , wherein the processing circuit is further configured to:
process the data, and
write a result of the processing of the data directly to the nonvolatile memory device.
14 . A system, comprising:
a host, comprising a host central processing unit (CPU), and
a storage device according to claim 1 , wherein
the host is configured to:
write, to the processing circuit, an address, in the nonvolatile memory device, of data to be processed.
15 . The system of claim 14 , wherein:
the host is configured to write parameters to memory in the processing circuit; and
the processing circuit is configured to process data based on the parameters.
16 . The system of claim 14 , wherein the processing circuit is configured to read the data to be processed directly from the nonvolatile memory device.
17 . The system of claim 14 , wherein the processing circuit is further configured to:
process the data, and
write a result of the processing of the data directly to the nonvolatile memory device.