Fault tolerant systems and methods for cache flush coordination
View Patent ↗In part, the disclosure relates to a method of performing a checkpoint process in an active-active computer system including a first node and a second node, wherein each node includes an active checkpoint cache, flush cache, and data storage. In various embodiments, flush operations are coordinated between nodes. The method includes receiving a request for a checkpoint operation at the first node; pausing activity at the first node; notifying the second node of the impending checkpoint operation; performing the checkpoint operation, wherein data associated with the checkpoint operation includes the active checkpoint cache and the flush cache; merging the active checkpoint cache into the flush cache; and resuming activity at the first node. The method may also include each node informing the other node of the completion of cache flush operations.
1. A method of performing a checkpoint process in an active-active computer system including a first node and a second node, wherein each node includes an active checkpoint cache, flush cache, and data storage, the method comprising:
receiving a request for a checkpoint operation at the first node;
pausing activity at the first node;
notifying the second node of the impending checkpoint operation;
performing the checkpoint operation, wherein data associated with the checkpoint operation includes the active checkpoint cache and the flush cache;
merging the active checkpoint cache into the flush cache; and
resuming activity at the first node.
2. The method of claim 1 , further comprising:
receiving the notification of the impending checkpoint operation; and
pausing activity at the second node.
3. The method of claim 1 , further comprising:
flushing a cache entry from the flush cache to data storage at the first node;
clearing a bit associated with the first node and the cache entry, wherein the bit indicates whether the cache entry has been copied to the data storage;
constructing a clear dirty bit message associated with the cache entry; and
sending the clear dirty bit message to the second node.
4. The method of claim 3 , further comprising;
receiving the clear dirty bit message at the second node; and
processing the clear dirty bit message.
5. The method of claim 4 , further comprising:
associating the clear dirty bit message with one or more cache entries at the second node; and
determining whether to remove a cache entry based on the one or more cache entries associated with the clear dirty bit message.
6. The method of claim 1 wherein the first node is a source computer and wherein the second node is a target computer.
7. The method of claim 1 or 5 further comprising:
flushing to permanent storage on the second node;
sending a clear dirty message to the primary node; and
removing from cache on the primary node.
8. The method of claim 1 further comprising
constructing a first active checkpoint cache in memory of first node;
constructing a second active checkpoint cache in memory of second node;
constructing a first flush cache in memory of first node; and
constructing a second flush cache in memory of second node.