IP Library Granted Patent US 11,228,077
Granted Patent B2
US 11,228,077 · App. 16/901,803 · Granted Jan 18, 2022

Microstrip DC block

Inventor: Marat Patotski (Gdansk, PL)
Assignee: CARRIER CORPORATION
H01P3/081H01P1/2039
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Quick Facts
Patent No.
US 11,228,077
App. No.
16/901,803
Granted
Jan 18, 2022
Kind
B2
Abstract

A microstrip DC block includes a first signal line having a first signal line end and a first centreline (C 1 ); a second signal line having a second signal line end and a second centreline (C 2 ); a first spur-line extending from the first signal line end towards the second signal line end; a first stepped impedance line extending from the first signal line end towards the second signal line end, wherein the first stepped impedance line is parallel to the first spur line; a second spur-line extending from the second signal line end towards the first signal line end; a second stepped impedance line extending from the second signal line end towards the first signal line end, wherein the second stepped impedance line is parallel to the second spur line, and wherein the second stepped impedance line is coupled to the first stepped impedance line.

Claims (30)

1. A microstrip DC block comprising:

a first signal line having a first signal line end and a first centreline;

a second signal line having a second signal line end and a second centreline;

a first spur-line electrically connected to and extending from the first signal line end towards the second signal line end;

a first stepped impedance line electrically connected to and extending from the first signal line end towards the second signal line end, wherein the first stepped impedance line is parallel to the first spur line;

a second spur-line electrically connected to and extending from the second signal line end towards the first signal line end;

a second stepped impedance line electrically connected to and extending from the second signal line end towards the first signal line end, wherein the second stepped impedance line is parallel to the second spur line, and wherein the second stepped impedance line is coupled to the first stepped impedance line;

wherein the first spur-line extends from a portion of the first signal line end that is proximate to a side of the first signal line, and wherein the first stepped impedance line extends from a portion of the first signal line end that is adjacent to the first spur-line and is proximate to the first centreline;

wherein the second spur-line extends from a portion of the second signal line end that is proximate to a side of the second signal line, and wherein the second stepped impedance line extends from a portion of the second signal line end that is adjacent to the second spur-line and is proximate to the second centreline, and

wherein the first and second spur-lines and the first and second stepped impedance lines are parallel to one another.

2. The microstrip DC block of claim 1 , wherein the first stepped impedance line has a narrow portion and a wide portion, and wherein the second stepped impedance line has a narrow portion and a wide portion.

3. The microstrip DC block of claim 2 , wherein the narrow portion of the first stepped impedance line has a length greater than that of the first spur-line, and wherein the narrow portion of the second stepped impedance line has a length greater than that of the second spur-line.

4. The microstrip DC block of claim 2 , wherein the wide portion of the first stepped impedance line is shorter than the narrow portion of the first stepped impedance line, and wherein the wide portion of the second stepped impedance line is shorter than the narrow portion of the second stepped impedance line.

5. The microstrip DC block of claim 2 , wherein the wide portion of the first stepped impedance line has an end that is proximate to the second signal line end, and wherein the wide portion of the second stepped impedance line has an end that is proximate to the first signal line end.

6. The microstrip DC block of claim 2 , wherein the narrow portion and the wide portion of the first stepped impedance line have a common edge with the stepped impedance line being widened by increasing its width from the common edge in a direction substantially perpendicular to the centreline of the first signal line.

7. The microstrip DC block of claim 1 , wherein the DC block is for use with a signal having an alternating current, a frequency f, and a wavelength in the microstrip line λ g.

8. The microstrip DC block of claim 7 , wherein the first spur-line has a length of approximately λ g/12.

9. The microstrip DC block of claim 7 , wherein the second spur-line has a length of approximately λ g/12.

10. The microstrip DC block of claim 1 , wherein the portion of the second signal line from which the second spur-line extends is diagonally opposite to the portion of the first signal line from which the first spur-line extends.

11. The microstrip DC block of claim 1 , wherein the first centreline and the second centreline are substantially coincident.

12. The microstrip DC block of claim 1 , wherein the overall electrical length, Q, of the stepped impedance line is

π

2

.

88

rad

.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2025
From: CARRIER CORPORATION; CARRIER GLOBAL CORPORATION; CARRIER FIRE & SECURITY EMEA; CARRIER FIRE & SECURITY, LLC; CARRIER CANADA CORPORATION; CLIMATE, CONTROLS & SECURITY ARGENTINA S.A.; KIDDE IP HOLDINGS , INC.; KIDDE LTD.; KIDDE PRODUCTS LTD.; CARRIER TRANSICOLD AUSTRIA GMBH; CARRIER TRANSICOLD FRANCE SCS
To: KIDDE FIRE PROTECTION, LLC
Reel/Frame 072829/0172 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2020
From: PATOTSKI, MARAT
To: CARRIER CORPORATION
Reel/Frame 052946/0619 →