IP Library Granted Patent US 11,119,606
Granted Patent B2
US 11,119,606 · App. 16/904,384 · Granted Sep 14, 2021

Background capacitance compensation

Inventor: Guozhong Shen (San Jose, CA)
Assignee: Synaptics Incorporated
G06F3/0418G06F3/044
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Quick Facts
Patent No.
US 11,119,606
App. No.
16/904,384
Granted
Sep 14, 2021
Kind
B2
Abstract

A processing system comprises sensor circuitry and a baseline correction mechanism. The sensor circuitry comprises a receiver channel having an input configured to acquire a resulting signal from a sensor electrode. A background capacitance is formed between the sensor electrode and a conductive element. The baseline correction mechanism is coupled to the input of the receiver channel. The baseline correction mechanism comprises a resistive element configured to be driven with a compensation signal to at least partially mitigate the background capacitance.

Claims (28)

1. A processing system comprising:

sensor circuitry comprising a first receiver channel coupled to a first sensor electrode and having an input configured to acquire a first resulting signal from the first sensor electrode, wherein a first background capacitance is formed between the first sensor electrode and a conductive element, and wherein the sensor circuitry modulates the first sensor electrode with a sensing signal to acquire the first resulting signal; and

a first baseline correction mechanism coupled to the input of the first receiver channel, the first baseline correction mechanism comprising a first resistive element configured to be driven with a first compensation signal to at least partially mitigate the first background capacitance, wherein a phase of the first compensation signal differs from a phase of the sensing signal.

2. The processing system of claim 1 , wherein a frequency of the first compensation signal is substantially similar to a frequency of the sensing signal.

3. The processing system of claim 1 , wherein the first resistive element is a variable resistive element.

4. The processing system of claim 3 , wherein the variable resistive element comprises a resistor ladder having a plurality of selectable resistors.

5. The processing system of claim 1 further comprising a second baseline correction mechanism coupled to the input of the first receiver channel, the second baseline correction mechanism comprising a capacitive element.

6. The processing system of claim 1 , wherein the sensor circuitry further comprises a second receiver channel configured to acquire a second resulting signal from a second sensor electrode, and wherein the processing system further comprises a second baseline correction mechanism coupled to an input of the second receiver channel.

7. The processing system of claim 1 , wherein the first receiver channel comprises an integrator and a feedback resistor coupled between an output of the integrator and an inverting input of the integrator.

8. An input device comprising:

a first sensor electrode;

a conductive element; and

a processing system comprising:

sensor circuitry comprising a first receiver channel coupled to the first sensor electrode and having an input configured to acquire a first resulting signal from the first sensor electrode, wherein a first background capacitance is formed between the first sensor electrode and the conductive element, and wherein the sensor circuitry modulates the first sensor electrode with a sensing signal to acquire the first resulting; and

a first baseline correction mechanism coupled to the input of the first receiver channel, the first baseline correction mechanism comprising a first resistive element configured to be driven with a first compensation signal to at least partially mitigate the first background capacitance, wherein a phase of the first compensation signal differs from a phase of the sensing signal.

9. The input device of claim 8 , wherein a frequency of the first compensation signal is substantially similar to a frequency of the sensing signal.

10. The input device of claim 8 , wherein the first resistive element is a variable resistive element.

11. The input device of claim 10 , wherein the variable resistive element comprises a resistor ladder having a plurality of selectable resistors.

12. The input device of claim 8 , wherein the processing system further comprises a second baseline correction mechanism coupled to the input of the first receiver channel, the second baseline correction mechanism comprising a capacitive element.

13. The input device of claim 8 further comprising a second sensor electrode, wherein the sensor circuitry further comprises a second receiver channel configured to acquire a second resulting signal from the second sensor electrode, and wherein the processing system further comprises a second baseline correction mechanism coupled to an input of the second receiver channel.

14. A method for operating a sensing device, the method comprising:

driving, during a first period, a resistive element of a first baseline correction mechanism with a first compensation signal to mitigate a background capacitance between a sensor electrode and a conductive element, the first baseline correction mechanism is coupled to an input of a receiver channel of sensor circuitry, wherein the receiver channel is coupled to the sensor electrode;

modulating, during the first period, the sensor electrode with a sensing signal, wherein a phase of the first compensation signal differs from a phase of the sensing signal;

acquiring, during the first period, a resulting signal from the sensor electrode with the receiver channel; and

determining positional information for an input object based on the resulting signal.

15. The method of claim 14 , wherein the first compensation signal is substantially similar to a frequency of the sensing signal.

16. The method of claim 14 , wherein the resistive element is a variable resistive element.

17. The method of claim 14 further comprising driving, during the first period, a capacitive element of a second baseline correction mechanism with a second compensation signal, the second baseline correction mechanism is coupled to the input of the receiver channel.

Assignments (2)
SECURITY INTEREST Recorded Mar 12, 2021
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 055581/0737 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 18, 2020
From: SHEN, GUOZHONG
To: SYNAPTICS INCORPORATED
Reel/Frame 052984/0631 →