Memory controller performing host-aware performance booster mode and method of operating the same
An electronic device includes a memory controller selecting map data to be output to a host. The memory controller includes an address counter and a map data selector. The address counter counts a number of times a logical block address corresponding to a request is received based on the request received from the host and outputs an activation signal indicating that an index to which the logical block address belongs is an activation index when an activation count corresponding to the index is equal to or greater than a preset value, the activation count being generated based on a counting result. The map data selector selects map data to be output to the host based on the activation signal. The address counter decreases the activation count by a preset size when a size of the selected map data exceeds a storage capacity of the host allocated for storing map data.
1. A method of operating a memory controller, the method comprising:
receiving a request from a host;
generating an activation count indicating a total number of times requested for a logical block address corresponding to the request;
outputting selected map data corresponding to an index to the host based on an activation signal, indicating an index of map data including the logical block address, wherein the activation signal is output by an address counter of the memory controller when the activation count exceeds a reference value; and
decreasing the activation count by a preset size when a size of the selected map data exceeds a storage capacity of the host allocated for storing the selected map data.
2. The method of claim 1 , wherein generating the activation count comprises:
generating an increased activation count, when the request received from the host is a read request; and
generating a decreased activation count, when the request received from the host is a program request or an erase request.
3. The method of claim 1 , wherein outputting the selected map data to the host comprises outputting selected map data indicating a mapping relationship between logical block addresses corresponding to the index and corresponding physical block addresses.
4. The method of claim 1 , wherein decreasing the activation count comprises decreasing activation counts corresponding to all activation indices, by a predetermined size.
5. The method of claim 1 , wherein decreasing the activation count comprises:
decreasing an activation count corresponding to a first index, to which a logical block address corresponding to a program or erase request belongs, by a predetermined size; and
maintaining activation counts corresponding to indices except for the activation count corresponding to the first index.
6. The method of claim 1 , wherein decreasing the activation count comprises:
decreasing an activation count corresponding to a first index, to which a logical block address corresponding to a program or erase request belongs, by a predetermined size; and
decreasing activation counts corresponding to indices except for the activation count corresponding to the first index by a preset size.
7. The method of claim 6 , wherein decreasing the activation count comprises decreasing the activation counts corresponding to the indices by differentiating the decreased sizes of the activation counts according to sizes of the activation counts corresponding to the indices.
8. A memory controller, comprising:
a processor;
an address counter configured to receive a request from a host, generate an activation count indicating a total number of times requested for a logical block address corresponding to the request, and output an activation signal indicating an index of map data including the logical block address when the activation count exceeds a reference value; and
a map data selector configured to output selected map data corresponding to the index to the host based on the activation signal,
wherein the address counter decreases the activation count by a preset size when a size of the selected map data exceeds a storage capacity of the host allocated for storing the selected map data.
9. The memory controller of claim 8 , wherein
the address counter is configured to generate the activation count in response to the request.
10. The memory controller of claim 9 , wherein the address counter is configured to generate an increased activation count, when the request received from the host is a read request, and
the address counter is configured to generate a decreased activation count, when the request received from the host is a program request or an erase request.
11. The memory controller of claim 8 , wherein when the activation count is equal to or greater than the reference value, the index is determined as an activation index, and
when the activation count is less than the reference value, the index is determined as an deactivation index.
12. The memory controller of claim 11 , wherein the map data selector is configured to output selected map data indicating a mapping relationship between logical block addresses corresponding to the index and corresponding physical block addresses.
13. The memory controller of claim 11 , wherein the map data selector is configured to output a deactivation index scan request for detecting the deactivation index to the address counter when the size of the selected map data exceeds the storage capacity of the host.
14. The memory controller of claim 13 , wherein, when the activation signal is a first activation signal, the address counter is configured to detect the deactivation index in response to the deactivation index scan request, and then output a second activation signal to the map data selector.
15. The memory controller of claim 14 , wherein the map data selector is configured to output a decrease request for decreasing an activation count to the address counter when a size of map data selected based on the second activation signal exceeds the storage capacity of the host.
16. The memory controller of claim 15 , wherein the address counter is configured to decrease activation counts corresponding to all activation indices by a predetermined size in response to the decrease request.
17. The memory controller of claim 15 , wherein, in response to the decrease request, the address counter is configured to decrease an activation count corresponding to a first index, to which a logical block address corresponding to a program or erase request belongs, by a predetermined size, and maintain activation counts corresponding to indices except for the activation count corresponding to the first index.
18. The memory controller of claim 15 , wherein, in response to the decrease request, the address counter is configured to decrease an activation count corresponding to a first index, to which a logical block address corresponding to a program or erase request belongs, by a predetermined size, and decrease activation counts corresponding to indices except for the activation count of the first index by a preset size.
19. The memory controller of claim 18 , wherein the address counter is configured to decrease the activation counts corresponding to the indices by differentiating the decreased sizes of the activation counts according to sizes of the activation counts corresponding to the indices.
20. The memory controller of claim 15 , wherein the address counter is configured to decrease the activation count in response to the decrease request and then outputs a third activation signal, and
the map data selector is configured to output again selected map data to the host based on the third activation signal and the storage capacity of the host.