Geometry for threshold voltage tuning on semiconductor device
Semiconductor device structures having gate structures with tunable threshold voltages are provided. Various geometries of device structure can be varied to tune the threshold voltages. In some examples, distances from tops of fins to tops of gate structures can be varied to tune threshold voltages. In some examples, distances from outermost sidewalls of gate structures to respective nearest sidewalls of nearest fins to the respective outermost sidewalls (which respective gate structure overlies the nearest fin) can be varied to tune threshold voltages.
1. A structure comprising:
a first fin on a substrate;
a second fin on the substrate;
a first gate structure over the first fin, a first distance being from a top of the first fin to a top of the first gate structure; and
a second gate structure over the second fin, wherein the first and second gate structures are replacement gate structures, a second distance being from a top of the second fin to a top of the second gate structure, the first distance being greater than the second distance.
2. The structure of claim 1 , wherein the top of the first gate structure is not coplanar with the top of the second gate structure.
3. The structure of claim 1 , wherein a height of the first fin is equal to a height of the second fin.
4. The structure of claim 1 , further comprising a dielectric cap over the second gate structure, a top of the dielectric cap being coplanar with the top of the first gate structure.
5. The structure of claim 1 , wherein each replacement gate structure comprises a conformal gate dielectric layer, a work function tuning layer over the conformal gate dielectric layer, and a conductive fill material over the work function tuning layer.
6. The structure of claim 1 , wherein the first gate structure is associated with a first threshold voltage, and wherein the second gate structure is associated with a second threshold voltage, different than the first threshold voltage.
7. The structure of claim 1 , further comprising a third fin on the substrate, and a third gate structure over the third fin, a third distance being from a top of the third fin to the third gate structure, the third distance being different than the first distance and the second distance.
8. A structure comprising:
a substrate comprising a plurality of regions, each region comprising one or more fins formed on the substrate; and
a plurality of gate structures over the one or more fins in the plurality of regions, wherein:
first one or more gate structures, of the plurality of gate structures, in at least a first region of the plurality of regions have respective tops a first distance from respective tops of the one or more fins over which the first one or more gate structures are formed,
second one or more gate structures, of the plurality of gate structures, in at least a second region of the plurality of regions have respective tops a second distance from respective tops of the one or more fins over which the second one or more gate structures are formed, the second distance being smaller than the first distance, and
a third one or more gate structures over the one or more fins in a third region of the plurality of regions, tops of the third one or more gate structures having a third distance from respective tops of the one or more fins over which the third one or more gate structures are formed, the third distance different than the first and second distances.
9. The structure of claim 8 , wherein the tops of the first one or more gate structures are not coplanar with the tops of the second one or more gate structures.
10. The structure of claim 8 , wherein heights of the one or more fins in the at least the first region are equal to heights of the one or more fins in the at least the second region.
11. The structure of claim 8 , further comprising a dielectric cap over the one or more second gate structures, a top of the dielectric cap being coplanar with the top of the first one or more gate structures.
12. The structure of claim 8 , wherein the first and second one or more gate structures are replacement gate structures, each replacement gate structure comprising a conformal gate dielectric layer, a work function tuning layer over the conformal gate dielectric layer, and a conductive fill material over the work function tuning layer.
13. The structure of claim 8 , wherein the first one or more gate structures are associated with a first threshold voltage, and wherein the second one or more gate structures are associated with a second threshold voltage, different than the first threshold voltage.
14. The structure of claim 8 , wherein heights of the one or more fins in the at least the first region are different than heights of the one or more fins in the at least the second region.
15. A structure comprising:
a first fin on a substrate, the first fin having a first upper surface;
a second fin on the substrate, the second fin having a second upper surface, the first upper surface being level with the second upper surface;
a first gate structure over the first fin, a first distance being a shortest measured distance from the first upper surface of the first fin to an upper surface of the first gate structure;
a second gate structure over the second fin, a second distance being a shortest measured distance from the second upper surface of the second fin to an upper surface of the second gate structure, the first distance being larger than the second distance; and
isolation regions along opposing sides of the first fin and the second fin, wherein an upper surface of the isolation regions adjacent the first fin is level with an upper surface of the isolation regions adjacent the second fin.
16. The structure of claim 15 further comprising a dielectric cap over the second fin, wherein a third distance is a shortest distance from the upper surface of the second fin to an upper surface of the dielectric cap, wherein the third distance is substantially the same as the first distance.
17. The structure of claim 15 further comprising:
a dielectric cap over the second fin; and
dielectric structures along opposing sides of the first gate structure and the second gate structure, wherein an upper surface of the dielectric cap, the upper surface of the first gate structure, and an upper surface of the dielectric structures are level.
18. The structure of claim 15 , wherein the first gate structure comprises one or more first conductive layers, wherein the second gate structure comprises the one or more first conductive layers.
19. The structure of claim 15 , wherein the first gate structure is associated with a first threshold voltage, and wherein the second gate structure is associated with a second threshold voltage, different than the first threshold voltage.
20. The structure of claim 15 , wherein an upper surface of the first fin is offset from an upper surface of the second fin.