IP Library Granted Patent US 11,314,582
Granted Patent B2
US 11,314,582 · App. 16/910,660 · Granted Apr 26, 2022

Systems and methods for dynamically resolving hardware failures in an information handling system

Inventors: Craig L. Chaiken (Pflugerville, TX); Siva Subramaniam Rajan (Austin, TX)
Assignee: Dell Products L.P.
G06F11/0793G06F11/0706G06F11/0751
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Quick Facts
Patent No.
US 11,314,582
App. No.
16/910,660
Granted
Apr 26, 2022
Kind
B2
Abstract

An information handling system may include a processor and a basic input/output system configured to, responsive to an occurrence of an exception error, triage among various hardware components of the information handling system to determine existence of any signatures of potential hardware failures, write a database structure to a non-volatile memory including the signatures of potential hardware failures, upon boot of the basic input/output system, enable one or more control methods for hardware failure mitigations associated with the signatures of potential hardware failures, and perform the mitigations during execution of an operating system of the information handling system.

Claims (38)

1. An information handling system comprising:

a processor; and

a basic input/output system configured to:

responsive to an occurrence of an exception error, triage among various hardware components of the information handling system to determine existence of any signatures of potential hardware failures;

write a database structure to a non-volatile memory including the signatures of potential hardware failures;

upon boot of the basic input/output system, enable one or more control methods for hardware failure mitigations associated with the signatures of potential hardware failures; and

perform the mitigations during execution of an operating system of the information handling system.

2. The information handling system of claim 1 , the basic input/output system further configured to create the one or more control methods based on the database structure.

3. The information handling system of claim 1 , the basic input/output system further configured to determine the exception error based on a variable indicating the exception error.

4. The information handling system of claim 1 , wherein the one or more control methods comprise Advanced Configuration and Power Interface polling events.

5. The information handling system of claim 1 , wherein the one or more control methods comprise periodic System Management Interface events.

6. The information handling system of claim 1 , wherein the basic input/output system comprises a library of failure signature detection mechanisms and plans for hardware mitigations.

7. The information handling system of claim 1 , wherein the basic input/output system is further configured to disable hardware failure mitigations for which associated signatures of potential hardware failures are absent.

8. A method comprising, in a basic input/output system of an information handling system:

responsive to an occurrence of an exception error, triaging among various hardware components of the information handling system to determine existence of any signatures of potential hardware failures;

writing a database structure to a non-volatile memory including the signatures of potential hardware failures;

upon boot of the basic input/output system, enabling one or more control methods for hardware failure mitigations associated with the signatures of potential hardware failures; and

performing the mitigations during execution of an operating system of the information handling system.

9. The method of claim 8 , further comprising creating the one or more control methods based on the database structure.

10. The method of claim 8 , further comprising determining the exception error based on a variable indicating the exception error.

11. The method of claim 8 , wherein the one or more control methods comprise Advanced Configuration and Power Interface polling events.

12. The method of claim 8 , wherein the one or more control methods comprise periodic System Management Interface events.

13. The method of claim 8 , wherein the basic input/output system comprises a library of failure signature detection mechanisms and plans for hardware mitigations.

14. The method of claim 8 , further comprising disabling hardware failure mitigations for which associated signatures of potential hardware failures are absent.

15. An article of manufacture comprising:

a processor;

a non-transitory computer-readable medium; and

computer-executable instructions carried on the computer-readable medium, the instructions readable by the processor, the instructions, when read and executed, for causing the processor to, in a basic input/output system of an information handling system:

responsive to an occurrence of an exception error, triage among various hardware components of the information handling system to determine existence of any signatures of potential hardware failures;

write a database structure to a non-volatile memory including the signatures of potential hardware failures;

upon boot of the basic input/output system, enable one or more control methods for hardware failure mitigations associated with the signatures of potential hardware failures; and

perform the mitigations during execution of an operating system of the information handling system.

16. The article of claim 15 , the instructions for further causing the processor to create the one or more control methods based on the database structure.

17. The article of claim 15 , the instructions for further causing the processor to determine the exception error based on a variable indicating the exception error.

18. The article of claim 15 , wherein the one or more control methods comprise Advanced Configuration and Power Interface polling events.

19. The article of claim 15 , wherein the one or more control methods comprise periodic System Management Interface events.

20. The article of claim 15 , wherein the basic input/output system comprises a library of failure signature detection mechanisms and plans for hardware mitigations.

21. The article of claim 15 , the instructions for further causing the processor to disable hardware failure mitigations for which associated signatures of potential hardware failures are absent.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053574/0221) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060333/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053578/0183) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060332/0864 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053573/0535) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060333/0106 →
RELEASE OF SECURITY INTEREST AT REEL 053531 FRAME 0108 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0371 →
SECURITY INTEREST Recorded Aug 21, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 053578/0183 →
SECURITY INTEREST Recorded Aug 21, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 053573/0535 →
SECURITY INTEREST Recorded Aug 21, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 053574/0221 →
SECURITY AGREEMENT Recorded Aug 18, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 053531/0108 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2020
From: CHAIKEN, CRAIG L.; RAJAN, SIVA SUBRAMANIAM
To: DELL PRODUCTS L.P.
Reel/Frame 053027/0546 →
Continuity (1)
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