IP Library Granted Patent US 11,536,899
Granted Patent B2
US 11,536,899 · App. 16/916,781 · Granted Dec 27, 2022

Integrated bandgap temperature sensor

Inventors: John Parker (Goleta, CA); Benjamin M. Curtin (Santa Barbara, CA)
Assignee: OpenLight Photonics, Inc.
G02B6/1225G02B2006/1213G02B2006/12138
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Quick Facts
Patent No.
US 11,536,899
App. No.
16/916,781
Granted
Dec 27, 2022
Kind
B2
Abstract

Absolute temperature measurements of integrated photonic devices can be accomplished with integrated bandgap temperature sensors located adjacent the photonic devices. In various embodiments, the temperature of the active region within a diode structure of a photonic device is measured with an integrated bandgap temperature sensor that includes one or more diode junctions either in the semiconductor device layer beneath the active region or laterally adjacent to the photonic device, or in a diode structure formed above the semiconductor device layer and adjacent the diode structure of the photonic device.

Claims (19)

1. A system comprising:

a substrate comprising a semiconductor device layer;

an integrated photonic device including a waveguide formed in the semiconductor device layer and a first diode structure formed above the waveguide; and

an integrated bandgap temperature sensor comprising a second diode structure formed above the semiconductor device layer adjacent the first diode structure,

wherein the first and second diode structures are formed in a stack of doped semiconductor material disposed above the semiconductor device layer, the stack of doped semiconductor material comprising five consecutive layers consisting of, in this order from bottom to top, a doped first layer of a first type of doping, a doped second layer of a second type of doping, a doped third layer of the first type of doping, an intrinsic fourth layer, and a doped fifth layer of the second type of doping, wherein the first type of doping is one of n-type doping or p-type doping and the second type of doping is the other one of n-type doping or p-type doping, and wherein a diode junction of the first diode structure is formed in the third, fourth, and fifth layers and a diode junction of the second diode structure is formed in the first and second layers.

2. The system of claim 1 , wherein the semiconductor device layer is a silicon device layer and the first and second diode structures each comprise III-V compound semiconductor material.

3. The system of claim 1 , wherein the bandgap temperature sensor further comprises an electronic circuit comprising a constant current source to supply a constant current to a diode of the second diode structure and a readout circuit to read out a voltage across the diode of the second diode structure.

4. The system of claim 3 , wherein the second diode structure comprises two diodes and the electronic circuit comprises two constant current sources to supply constant currents to the two diodes, the readout circuit configured to read out voltages across both of the two diodes.

5. The system of claim 4 , wherein diode junction areas of the two diodes differ.

6. The system of claim 4 , wherein the supplied constant currents differ between the two diodes.

7. A method of manufacturing a photonic integrated circuit with an integrated bandgap temperature sensor for measuring a temperature of an integrated photonic device, the method comprising:

creating a waveguide in a device layer of a semiconductor substrate;

bonding, to the semiconductor substrate, a stack of doped semiconductor material comprising five consecutive layers consisting of, in this order from bottom to top, a doped first layer of a first type of doping, a doped second layer of a second type of doping, a doped third layer of the first type of doping, an intrinsic fourth layer, and a doped fifth layer of the second type of doping, wherein the first type of doping is one of n-type doping or p-type doping and the second type of doping is the other one of n-type doping or p-type doping;

patterning and etching the stack of doped semiconductor material to form:

a first diode structure comprising a diode mesa formed in the fourth and fifth layers above a bottom strip formed in the first through third layers, the first diode structure being located above the waveguide in the device layer, and

a second diode structure forming a diode junction between the first and second layers, the second diode structure being adjacent the first diode structure but not contiguous with the first diode structure; and

creating metal connections to the third and fifth layers within the first diode structure and to the first and second layers within the second diode structure,

wherein the first diode structure forms part of the photonic device and the second diode structure forms part of the bandgap temperature sensor.

8. The method of claim 7 , wherein the semiconductor device layer is a silicon device layer and the stack of doped semiconductor material comprises III-V compound semiconductor material.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 7, 2022
From: AURRION, INC.
To: OPENLIGHT PHOTONICS, INC.
Reel/Frame 061624/0929 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2022
From: JUNIPER NETWORKS, INC.
To: AURRION, INC.
Reel/Frame 059774/0861 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2020
From: PARKER, JOHN; CURTIN, BENJAMIN M.
To: JUNIPER NETWORKS, INC.
Reel/Frame 053088/0471 →
Continuity (1)
Related Publication 20210405291A1 · Dec 30, 2021