IP Library Granted Patent US 11,379,330
Granted Patent B2
US 11,379,330 · App. 16/916,871 · Granted Jul 5, 2022

Information handling systems and related methods for testing memory during boot and during operating system (OS) runtime

Inventors: Craig L. Chaiken (Pflugerville, TX); Siva Subramaniam Rajan (Austin, TX)
Assignee: Dell Products L.P.
G06F11/2284G06F11/076G06F11/0763G06F11/0772G06F11/1068G06F11/1417G06F11/277G06F11/3037G06F11/3058
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Quick Facts
Patent No.
US 11,379,330
App. No.
16/916,871
Granted
Jul 5, 2022
Kind
B2
Abstract

Embodiments of information handling systems (IHSs) and computer-implemented methods are provided herein for testing system memory (or another volatile memory component) of an IHS. In the disclosed embodiments, memory testing is performed automatically: (a) during the pre-boot phase each time a new page of memory is allocated for the first time after a system boot, and (b) during OS runtime each time a read command is received and/or an event is detected. By proactively testing each page of memory, as the page is allocated but before information is stored therein, the systems and methods disclosed herein prevent “bad” memory pages from being used.

Claims (69)

1. A computer-implemented method performed by at least one processing device of an information handling system (IHS) for testing a volatile memory component of the IHS during a pre-boot phase of the IHS, wherein the computer-implemented method comprises:

creating a memory test bitmap (MTB) for all memory locations within the volatile memory component during the pre-boot phase before data or program code is stored within the volatile memory component, wherein each bit in the MTB represents one page of memory within the volatile memory component;

initializing all bits of the MTB to zero (0);

performing a memory test on at least one page of memory when the at least one page of memory is first allocated after the IHS is booted; and

setting a bit in the MTB corresponding to the at least one page of memory to one (1) to indicate that the at least one page of memory has been tested.

2. The computer-implemented method as recited in claim 1 , wherein said performing a memory test comprises:

determining if the bit in the MTB corresponding to the at least one page of memory is set to zero (0) or one (1) prior to performing the memory test; and

performing the memory test on the at least one page of memory only if the bit is set to zero (0).

3. The computer-implemented method as recited in claim 2 , wherein each time one or more pages of memory of the volatile memory component are first allocated after the IHS is booted, the computer-implemented method further comprises repeating the steps of:

performing a memory test on the one or more pages of memory; and

setting one or more bits in the MTB corresponding to the one or more pages of memory to one (1) to indicate that the one or more pages of memory have been tested.

4. The computer-implemented method as recited in claim 1 , wherein prior to said performing a memory test, the method further comprises selecting from a plurality of memory tests, a particular memory test to be performed on the at least one page of memory.

5. The computer-implemented method as recited in claim 4 , wherein said selecting a particular memory test comprises cycling through a list of memory tests by switching to a next memory test in the list at each subsequent boot.

6. The computer-implemented method as recited in claim 1 , wherein prior to said performing a memory test, the computer-implemented method further comprises:

creating one or more variables specifying one or more memory test parameters;

storing the one or more variables within a non-volatile memory component of the IHS; and

using at least one variable of the one or more variables to select a particular memory test from a plurality of memory tests prior to performing the particular memory test on the at least one page of memory.

7. The computer-implemented method as recited in claim 1 , wherein if the memory test detects a memory error within the at least one page of memory, the computer-implemented method further comprises:

writing details of the memory error to a data structure stored within a non-volatile memory component of the IHS; and

removing a region of memory in which the memory error was detected from a system memory map.

8. The computer-implemented method as recited in claim 1 , further comprising creating an Advanced Configuration and Power Interface (ACPI) table and storing a copy of the MTB within the ACPI table.

9. A computer-implemented method performed by at least one processing device of an information handling system (IHS) for testing a volatile memory component of the IHS during an operating system (OS) runtime, wherein the computer-implemented method comprises:

receiving a read command during OS runtime for reading data from a computer readable storage device of the IHS into the volatile memory component;

reading a memory location parameter specified in the read command, wherein the memory location parameter corresponds to one or more pages of memory within the volatile memory component; and

prior to writing the data into the one or more pages of memory, accessing a memory test bitmap stored within a non-volatile memory component of the IHS to determine if the one or more pages of memory have already been tested, wherein each bit in the memory test bitmap represents one page of memory within the volatile memory component;

wherein if the memory test bitmap indicates that at least one page of the one or more pages of memory has not yet been tested, the computer-implemented method further comprises:

performing a memory test on the at least one page of memory; and

setting a bit in the memory test bitmap corresponding to the at least one page of memory to indicate that the at least one page of memory has been tested.

10. The computer-implemented method as recited in claim 9 , wherein the memory test bitmap is stored within an Advanced Configuration and Power Interface (ACPI) region of the non-volatile memory component of the IHS.

11. The computer-implemented method as recited in claim 9 , wherein said accessing the memory test bitmap to determine if the one or more pages of memory have already been tested comprises:

determining that the one or more pages of memory have already been tested if all bits in the memory test bitmap corresponding to the one or more pages of memory is/are set to one (1); and

determining that at least one page of the one or more pages of memory has not yet been tested if at least one bit in the memory test bitmap corresponding to the at least one page of memory is set to zero (0).

12. The computer-implemented method as recited in claim 9 , further comprising:

reading at least one variable stored within the non-volatile memory component, the at least one variable specifying one or more memory test parameters; and

using the at least one variable to select a particular memory test from a plurality of memory tests prior to performing the particular memory test on the at least page of memory.

13. The computer-implemented method as recited in claim 9 , wherein if the memory test detects a memory error within the at least one page of memory, the computer-implemented method further comprises writing details of the memory error to a data structure stored within the non-volatile memory component, so that a region of memory in which the memory error was detected will be removed from a system memory map during a subsequent system boot.

14. The computer-implemented method as recited in claim 9 , wherein said performing a memory test comprises initially performing a default memory test on the at least one page of memory, and wherein the computer-implemented method further comprises:

detecting an event during OS runtime, wherein the event comprises one of the following: a memory error detected during the default memory test, an elapsed period of time, a system failure, or a temperature measurement exceeding or falling below a threshold;

resetting all bits of the memory test bitmap to zero in response to the detected event; and

selecting another memory test, which is more aggressive than the default memory test, to perform subsequent memory testing.

15. An information handling system (IHS), comprising:

at least one processing device;

a volatile memory component comprising physical memory;

a non-volatile memory component comprising boot firmware, wherein after the IHS is booted and before an operating system (OS) of the IHS is loaded, a boot service of the boot firmware is executed by the at least one processing device to:

create a memory test bitmap (MTB) for all physical memory contained within the volatile memory component before the boot firmware is stored within the volatile memory component, wherein each bit in the MTB represents one page of physical memory within the volatile memory component, and wherein each bit is:

set to zero (0) if a corresponding page of physical memory has not yet been tested; and

set to one (1) if a corresponding page of physical memory has already been tested; and

access the MTB each time a page of physical memory is allocated for the first time to determine if a bit corresponding to the page of physical memory has already been tested.

16. The information handling system as recited in claim 15 , wherein if the MTB indicates that the page of physical memory has not yet been tested, the boot service is further executed by the at least one processing device to:

perform a memory test on the page of physical memory; and

set a bit in the MTB corresponding to the page of physical memory to indicate that the page of physical memory has been tested;

wherein if the memory test detects a memory error within the page of physical memory, the boot service is further executed by the at least one processing device to:

write details of the memory error to a data structure stored within the non-volatile memory component; and

remove a region of memory in which the memory error was detected from a system memory map.

17. The information handling system as recited in claim 15 , wherein after the IHS is booted and before an operating system (OS) of the IHS is loaded, the boot service is further executed by the at least one processing device to:

store a copy of the MTB within an Advanced Configuration and Power Interface (ACPI) table stored within an ACPI region of the non-volatile memory component;

store at least one variable specifying at least one memory test parameter within the non-volatile memory component; and

create an ACPI Windows Management Instrumentation (WMI) method that enables details of any memory errors detected during OS runtime to be written to a data structure stored within the non-volatile memory component.

18. The information handling system as recited in claim 17 , further comprising a computer readable storage device comprising the OS and an OS filter driver, wherein during OS runtime, the OS filter driver is executed by the at least one processing device to:

receive a read command for reading data from the computer readable storage device into the volatile memory component;

read a memory location parameter specified in the read command, wherein the memory location parameter corresponds to at least one page of physical memory within the volatile memory component; and

prior to writing the data into the at least one page of physical memory, access the copy of the MTB stored within the non-volatile memory component to determine if the at least one page of physical memory has already been tested.

19. The information handling system as recited in claim 18 , wherein if the copy of the MTB indicates that the at least one page of physical memory has not yet been tested, the OS filter driver is further executed by the at least one processing device to:

perform a memory test on the at least one page of physical memory; and

set a bit in the copy of the MTB corresponding to the at least one page of physical memory to indicate that the at least one page of physical memory has been tested;

wherein if the memory test detects a memory error within the at least one page of physical memory, the OS filter driver is further executed by the at least one processing device to call the ACPI WMI method to write details of the memory error to a data structure stored within the non-volatile memory component, so that a region of memory in which the memory error was detected will be removed from a system memory map during a subsequent system boot.

20. The information handling system as recited in claim 19 , wherein prior to performing the memory test, the OS filter driver is further executed by the at least one processing device to:

read the at least one variable stored within the non-volatile memory component to select a particular memory test from a plurality of memory tests; and

perform the particular memory test specified in the at least one variable on the at least one page of physical memory.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053578/0183) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060332/0864 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053574/0221) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060333/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053573/0535) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060333/0106 →
RELEASE OF SECURITY INTEREST AT REEL 053531 FRAME 0108 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0371 →
SECURITY INTEREST Recorded Aug 21, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 053578/0183 →
SECURITY INTEREST Recorded Aug 21, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 053573/0535 →
SECURITY INTEREST Recorded Aug 21, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 053574/0221 →
SECURITY AGREEMENT Recorded Aug 18, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 053531/0108 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2020
From: CHAIKEN, CRAIG L.; RAJAN, SIVA SUBRAMANIAM
To: DELL PRODUCTS L.P.
Reel/Frame 053105/0944 →