Current-induced dark layer formation for metallization in electronic devices
In various embodiments, bilayers are formed in electronic devices at least in part by anodization of metal-alloy base layers.
1. A method of forming a microelectronic device, the method comprising:
providing a substrate;
depositing over the substrate a base layer comprising an alloy of Cu and/or Mo with 0.5 weight %-50 weight % of one or more anodizable alloying elements selected from the list consisting of Ta, Nb, Al, Hf, Zr, Ti, and Mg;
anodizing the base layer to form a bilayer barrier layer comprising (i) a dielectric layer and (ii) a remaining portion of the base layer disposed beneath the dielectric layer; and
depositing a conductor layer over the barrier layer,
wherein anodizing the base layer comprises applying an electrolyte to the base layer while applying a voltage thereto without immersing the base layer in the electrolyte.
2. The method of claim 1 , wherein the dielectric layer comprises an oxide, nitride, or oxynitride of the one or more anodizable alloying elements.
3. The method of claim 1 , wherein the electrolyte is applied to the base layer using a brush electrode.
4. The method of claim 1 , further comprising:
forming a mask layer over the conductor layer;
patterning the mask layer to reveal a portion of the conductor layer, a remaining portion of the mask layer at least partially defining a shape of an electrode; and
thereafter, removing portions of the conductor layer and the bilayer barrier layer not masked by the patterned mask layer.
5. The method of claim 1 , wherein the electrolyte comprises an acidic solution.
6. The method of claim 1 , wherein the electrolyte comprises sulfuric acid, nitric acid, chromic acid, and/or phosphoric acid.
7. The method of claim 1 , wherein the electrolyte comprises a basic solution.
8. The method of claim 1 , wherein the electrolyte comprises trisodium phosphate.
9. The method of claim 1 , further comprising:
depositing over at least a portion of the conductor layer a second base layer comprising an alloy of Cu and/or Mo with 0.5 weight %-50 weight % of one or more second anodizable alloying elements selected from the list consisting of Ta, Nb, Al, Hf, Zr, Ti, and Mg; and
anodizing the second base layer to form a bilayer capping layer comprising (i) a second dielectric layer and (ii) a remaining portion of the second base layer disposed beneath the second dielectric layer.
10. The method of claim 9 , wherein the base layer comprises an alloy the same as that of the second base layer.
11. The method of claim 9 , wherein the base layer comprises an alloy different from that of the second base layer.
12. The method of claim 9 , wherein the second dielectric layer comprises an oxide, nitride, or oxynitride of the one or more second anodizable alloying elements.
13. A method of forming a microelectronic device, the method comprising:
providing a substrate;
depositing over the substrate a base layer comprising an alloy of Cu and/or Mo with 0.5 weight %-50 weight % of one or more anodizable alloying elements selected from the list consisting of Ta, Nb, Al, Hf, Zr, Ti, and Mg;
anodizing the base layer to form a bilayer barrier layer comprising (i) a dielectric layer and (ii) a remaining portion of the base layer disposed beneath the dielectric layer; and
depositing a conductor layer over the barrier layer,
wherein anodizing the base layer comprises:
immersing the base layer in an electrolyte; and
applying a voltage between the base layer and a cathode.
14. The method of claim 13 , wherein the electrolyte comprises an acidic solution.
15. The method of claim 13 , wherein the electrolyte comprises sulfuric acid, nitric acid, chromic acid, and/or phosphoric acid.
16. The method of claim 13 , wherein the electrolyte comprises a basic solution.
17. The method of claim 13 , wherein the electrolyte comprises trisodium phosphate.
18. The method of claim 13 , wherein the dielectric layer comprises an oxide, nitride, or oxynitride of the one or more anodizable alloying elements.
19. The method of claim 13 , further comprising:
forming a mask layer over the conductor layer;
patterning the mask layer to reveal a portion of the conductor layer, a remaining portion of the mask layer at least partially defining a shape of an electrode; and
thereafter, removing portions of the conductor layer and the bilayer barrier layer not masked by the patterned mask layer.
20. The method of claim 13 , further comprising:
depositing over at least a portion of the conductor layer a second base layer comprising an alloy of Cu and/or Mo with 0.5 weight %-50 weight % of one or more second anodizable alloying elements selected from the list consisting of Ta, Nb, Al, Hf, Zr, Ti, and Mg; and
anodizing the second base layer to form a bilayer capping layer comprising (i) a second dielectric layer and (ii) a remaining portion of the second base layer disposed beneath the second dielectric layer.
21. The method of claim 20 , wherein the base layer comprises an alloy the same as that of the second base layer.
22. The method of claim 20 , wherein the base layer comprises an alloy different from that of the second base layer.
23. The method of claim 20 , wherein the second dielectric layer comprises an oxide, nitride, or oxynitride of the one or more second anodizable alloying elements.
24. A method of forming a microelectronic device, the method comprising:
providing a substrate;
depositing over the substrate a base layer comprising an alloy of Cu and/or Mo with 0.5 weight %-50 weight % of one or more anodizable alloying elements selected from the list consisting of Ta, Nb, Al, Hf, Zr, Ti, and Mg;
anodizing the base layer to form a bilayer barrier layer comprising (i) a dielectric layer and (ii) a remaining portion of the base layer disposed beneath the dielectric layer; and
depositing a conductor layer over the barrier layer, wherein the base layer is anodized at room temperature.
25. The method of claim 24 , wherein the dielectric layer comprises an oxide, nitride, or oxynitride of the one or more anodizable alloying elements.
26. The method of claim 24 , further comprising:
forming a mask layer over the conductor layer;
patterning the mask layer to reveal a portion of the conductor layer, a remaining portion of the mask layer at least partially defining a shape of an electrode; and
thereafter, removing portions of the conductor layer and the bilayer barrier layer not masked by the patterned mask layer.
27. The method of claim 24 , further comprising:
depositing over at least a portion of the conductor layer a second base layer comprising an alloy of Cu and/or Mo with 0.5 weight %-50 weight % of one or more second anodizable alloying elements selected from the list consisting of Ta, Nb, Al, Hf, Zr, Ti, and Mg; and
anodizing the second base layer to form a bilayer capping layer comprising (i) a second dielectric layer and (ii) a remaining portion of the second base layer disposed beneath the second dielectric layer.
28. The method of claim 27 , wherein the base layer comprises an alloy the same as that of the second base layer.
29. The method of claim 27 , wherein the base layer comprises an alloy different from that of the second base layer.
30. The method of claim 27 , wherein the second dielectric layer comprises an oxide, nitride, or oxynitride of the one or more second anodizable alloying elements.