IP Library Granted Patent US 11,542,151
Granted Patent B2
US 11,542,151 · App. 16/934,236 · Granted Jan 3, 2023

MEMS apparatus with anti-stiction layer

Inventors: Kuei-Sung Chang (Kaohsiung, TW); Fei-Lung Lai (New Taipei, TW); Shang-Ying Tsai (Pingzhen, TW); Cheng Yu Hsieh (Hsin Chu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
B81B3/0005B81B3/001B81C1/0096B81C1/00984B81B2201/0235B81B2201/0242B81B2201/0264B81B2201/0292B81C2201/112B81C2201/115B81C2203/036
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Quick Facts
Patent No.
US 11,542,151
App. No.
16/934,236
Granted
Jan 3, 2023
Kind
B2
Abstract

The present disclosure relates to a microelectromechanical systems (MEMS) apparatus. The MEMS apparatus includes a base substrate and a conductive routing layer disposed over the base substrate. A bump feature is disposed directly over the conductive routing layer. Opposing outermost sidewalls of the bump feature are laterally between outermost sidewalls of the conductive routing layer. A MEMS substrate is bonded to the base substrate and includes a MEMS device directly over the bump feature. An anti-stiction layer is arranged on one or more of the bump feature and the MEMS device.

Claims (43)

1. A microelectromechanical systems (MEMS) apparatus, comprising:

a base substrate;

a conductive routing layer disposed over the base substrate;

a bump feature disposed directly over the conductive routing layer, wherein opposing outermost sidewalls of the bump feature are laterally between outermost sidewalls of the conductive routing layer;

a MEMS substrate bonded to the base substrate and comprising a MEMS device directly over the bump feature;

an anti-stiction layer arranged on one or more of the bump feature and the MEMS device; and

wherein the anti-stiction layer comprises a topmost surface that continuously extends between opposing outermost sidewalls of the anti-stiction layer, an entirety of the topmost surface being vertically above a top of the bump feature.

2. The MEMS apparatus of claim 1 , wherein the bump feature directly contacts an upper surface of the conductive routing layer.

3. The MEMS apparatus of claim 1 , wherein the opposing outermost sidewalls of the anti-stiction layer extend from a bottom of the anti-stiction layer to the topmost surface of the anti-stiction layer.

4. The MEMS apparatus of claim 1 , wherein the anti-stiction layer comprises a rough upper surface that faces the MEMS device.

5. The MEMS apparatus of claim 1 , further comprising:

a conductive layer disposed directly between the bump feature and the anti-stiction layer.

6. The MEMS apparatus of claim 5 , wherein the conductive layer comprises a vertical segment extending along an outermost sidewall of the bump feature and a lateral segment extending outward from a sidewall of the vertical segment and away from the bump feature.

7. The MEMS apparatus of claim 5 , wherein the anti-stiction layer laterally extends past opposing outermost sidewalls of the conductive layer.

8. The MEMS apparatus of claim 5 , wherein the conductive layer laterally extends past opposing sides of the anti-stiction layer.

9. A microelectromechanical systems (MEMS) apparatus, comprising:

a conductive routing layer over a base substrate;

a bump feature disposed directly over an upper surface of the conductive routing layer;

a dielectric material disposed over the base substrate on opposing sides of the bump feature;

a MEMS substrate bonded to the base substrate by way of the dielectric material;

an anti-stiction layer arranged directly over the bump feature, wherein the anti-stiction layer has outermost sidewalls that are disposed laterally between sidewalls of the dielectric material facing the bump feature; and

a conductive layer disposed laterally and vertically directly between the bump feature and the anti-stiction layer.

10. The MEMS apparatus of claim 9 , wherein the outermost sidewalls of the anti-stiction layer are separated from the dielectric material by one or more non-zero distances that are directly over the conductive routing layer.

11. The MEMS apparatus of claim 9 , further comprising:

one or more conductive vias extending vertically through the bump feature, wherein the anti-stiction layer continuously extends over topmost surfaces of the bump feature and the one or more conductive vias.

12. The MEMS apparatus of claim 9 , further comprising: a second anti-stiction layer directly contacting a lower surface of the MEMS substrate that is directly over the bump feature.

13. The MEMS apparatus of claim 12 , wherein the anti-stiction layer physically contacts the bump feature directly below the second anti-stiction layer.

14. The MEMS apparatus of claim 9 , wherein the outermost sidewalls of the anti-stiction layer are directly over a topmost surface of the conductive routing layer.

15. A microelectromechanical systems (MEMS) apparatus, comprising:

a base substrate;

a bump feature over the base substrate;

a second bump feature over the base substrate, wherein the second bump feature is a closest neighboring bump feature of the bump feature;

a bonding structure disposed over the base substrate, wherein the bonding structure laterally surrounds the bump feature;

a MEMS substrate bonded to the base substrate by way of the bonding structure, wherein the MEMS substrate comprises a moveable MEMS device over the bump feature; and

an anti-stiction layer arranged directly over and along one or more sidewalls of the bump feature and the second bump feature, wherein the anti-stiction layer is discontinuous between the bump feature and the second bump feature.

16. The MEMS apparatus of claim 15 ,

wherein the anti-stiction layer continuously extends from directly over the bump feature to an outer sidewall that is coupled to a bottom of the anti-stiction layer; and

wherein the outer sidewall is laterally between the bump feature and the second bump feature and laterally separated from the bump feature by a non-zero lateral distance.

17. The MEMS apparatus of claim 15 , wherein the anti-stiction layer extends along a first sidewall, but not an opposing second sidewall, of the bump feature.

18. The MEMS apparatus of claim 15 , wherein the anti-stiction layer is asymmetrically disposed over the bump feature.

19. The MEMS apparatus of claim 15 , wherein the anti-stiction layer has opposing outermost sidewalls that both vertically extend to above a top of the bump feature.

20. The MEMS apparatus of claim 15 , further comprising:

a conductive routing layer having a top surface that continuously extends from directly below the bump feature to directly below the second bump feature.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2020
From: CHANG, KUEI-SUNG; LAI, FEI-LUNG; TSAI, SHANG-YING; HSIEH, CHENG YU
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 053262/0718 →
Continuity (3)
Continuation 15665517 · Aug 1, 2017
Provisional Application 62527225 · Jun 30, 2017
Related Publication 20200346919A1 · Nov 5, 2020