IP Library Granted Patent US 11,411,556
Granted Patent B2
US 11,411,556 · App. 16/938,063 · Granted Aug 9, 2022

Duty cycle control for switching power converters

Inventor: Carl Kenneth Walker (Taipei, TW)
Assignee: Astec International Limited
H03K7/08H02M3/157H02M3/3353H02M1/0025
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Quick Facts
Patent No.
US 11,411,556
App. No.
16/938,063
Granted
Aug 9, 2022
Kind
B2
Abstract

A switching power converter includes a power circuit including at least two power switching devices and a control circuit coupled to the power circuit for controlling the power switching devices. The control circuit is configured to sense an output voltage of the power circuit, generate at least two ramp signals based on complementary clock signals, and generate a control signal for controlling one of the power switching devices based on one of the ramp signals and the output voltage of the power circuit, and another control signal for controlling another one of the power switching devices based on another one of the ramp signals and the output voltage of the power circuit. In some examples, the control circuit may include comparators for generating the control signals. Other example power converters and control circuits are also disclosed.

Claims (44)

1. A switching power converter comprising:

a power circuit including at least two power switching devices, and

a control circuit coupled to the power circuit for controlling the power switching devices, the control circuit configured to:

sense an output voltage of the power circuit;

generate at least two ramp signals based on complementary clock signals;

generate a first control signal for controlling one of the power switching devices based on one of the ramp signals and the output voltage of the power circuit; and

generate a second control signal for controlling another one of the power switching devices based on another one of the ramp signals and the output voltage of the power circuit;

wherein the control circuit includes at least two comparators;

wherein one of the comparators is configured to generate the first control signal based on a comparison between said one of the ramp signals and the output voltage of the power circuit;

wherein another one of the comparators is configured to generate the second control signal based on a comparison between said another one of the ramp signals and the output voltage of the power circuit;

wherein the one of the comparators is configured to generate the first control signal without relying on an error signal; and

wherein the another one of the comparators is configured to generate the second control signal without relying on an error signal.

2. The switching power converter of claim 1 , wherein the control circuit is configured to generate at least two modified ramp signals based on the ramp signals and a reference voltage.

3. The switching power converter of claim 1 , wherein the control circuit includes control switching devices, and wherein the control circuit is configured to drive the control switching devices based on the complementary clock signals to set a fixed frequency of the first control signal and the second control signal.

4. The switching power converter of claim 1 , wherein the control circuit includes control switching devices, wherein one of the control switching devices is coupled to an output of said one of the comparators, wherein another one of the control switching devices is coupled to an output of said another one of the comparators, and wherein the control circuit is configured to drive the control switching devices based on the complementary clock signals to set a fixed frequency of the first control signal and the second control signal.

5. The switching power converter of claim 1 , wherein the power circuit includes an interleaved two-transistor forward topology having a first sub-circuit and a second sub-circuit, wherein said one of the power switching devices is a power switching device in the first sub-circuit, and wherein said another one of the power switching devices is a power switching device in the second sub-circuit.

6. A control circuit for controlling power switching devices of a power circuit, the control circuit including comparators, the control circuit configured to:

sense an output voltage of the power circuit; and

generate at least two ramp signals based on complementary clock signals;

wherein one of the comparators is configured to generate a first control signal for controlling one of the power switching devices based on a comparison between one of the ramp signals and the output voltage of the power circuit;

wherein another one of the comparators is configured to generate a second control signal for controlling another one of the power switching devices based on a comparison between another one of the ramp signals and the output voltage of the power circuit;

wherein the one of the comparators is configured to generate the first control signal without relying on an error signal; and

wherein the another one of the comparators is configured to generate the second control signal without relying on an error signal.

7. The control circuit of claim 6 , wherein the control circuit is configured to generate at least two modified ramp signals based on the ramp signals and a reference voltage.

8. The control circuit of claim 6 , further comprising control switching devices, one of the control switching devices coupled to an output of said one of the comparators, another one of the control switching devices coupled to an output of said another one of the comparators, and the control circuit configured to drive the control switching devices based on the complementary clock signals to set a fixed frequency of the first control signal and the second control signal.

9. A switching power converter comprising:

a power circuit including at least two power switching devices, and

a control circuit coupled to the power circuit for controlling the power switching devices, the control circuit configured to:

sense an output voltage of the power circuit;

generate at least two ramp signals based on complementary clock signals;

generate a first control signal for controlling one of the power switching devices based on one of the ramp signals and the output voltage of the power circuit; and

generate a second control signal for controlling another one of the power switching devices based on another one of the ramp signals and the output voltage of the power circuit;

wherein the control circuit includes at least two comparators;

wherein one of the comparators is configured to generate the first control signal based on a comparison between said one of the ramp signals and the output voltage of the power circuit;

wherein another one of the comparators is configured to generate the second control signal based on a comparison between said another one of the ramp signals and the output voltage of the power circuit;

wherein the one of the comparators is configured to generate the first control signal without relying on an error amplifier; and

wherein the another one of the comparators is configured to generate the second control signal without relying on an error amplifier.

10. A control circuit for controlling power switching devices of a power circuit, the control circuit including comparators, the control circuit configured to:

sense an output voltage of the power circuit; and

generate at least two ramp signals based on complementary clock signals;

wherein one of the comparators is configured to generate a first control signal for controlling one of the power switching devices based on a comparison between one of the ramp signals and the output voltage of the power circuit;

wherein another one of the comparators is configured to generate a second control signal for controlling another one of the power switching devices based on a comparison between another one of the ramp signals and the output voltage of the power circuit;

wherein the one of the comparators is configured to generate the first control signal without relying on an error amplifier; and

wherein the another one of the comparators is configured to generate the second control signal without relying on an error amplifier.

Assignments (2)
CONFIRMATORY PATENT ASSIGNMENT Recorded Mar 5, 2025
From: ASTEC INTERNATIONAL LIMITED
To: AES GLOBAL HOLDINGS PTE. LTD.
Reel/Frame 070404/0904 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2020
From: WALKER, CARL KENNETH
To: ASTEC INTERNATIONAL LIMITED
Reel/Frame 053358/0467 →