Data processing unit for stream processing
A new processing architecture is described that utilizes a data processing unit (DPU). Unlike conventional compute models that are centered around a central processing unit (CPU), the DPU that is designed for a data-centric computing model in which the data processing tasks are centered around the DPU. The DPU may be viewed as a highly programmable, high-performance I/O and data-processing hub designed to aggregate and process network and storage I/O to and from other devices. The DPU comprises a network interface to connect to a network, one or more host interfaces to connect to one or more application processors or storage devices, and a multi-core processor with two or more processing cores executing a run-to-completion data plane operating system and one or more processing cores executing a multi-tasking control plane operating system. The data plane operating system is configured to support software functions for performing the data processing tasks.
1. A device comprising:
an integrated circuit comprising:
at least one interface configured to send and receive stream data units,
a plurality of programmable processing cores, and
a plurality of work unit queues, wherein each work unit queue of the plurality of work unit queues is associated with one of the programmable processing cores and configured to store a plurality of work units enqueued for processing on the one of the programmable processing cores, wherein each work unit of the plurality of work units is associated with one or more of the stream data units; and
a run-to-completion data plane operating system configured to execute on at least the one of the programmable processing cores,
wherein the integrated circuit further comprises a queue manager configured to, upon dequeuing the work unit from the work unit queue associated with the one of the programmable processing cores, invoke a software function specified by the work unit for execution on the data plane operating system on the one of the programmable processing cores specified by the work unit for processing the one or more of the stream data units.
2. The device of claim 1 , wherein the device comprises one of a compute node or a storage node.
3. The device of claim 1 , wherein the queue manager is further configured to:
receive the work unit specifying the software function and the one of the programmable processing cores for executing the software function;
enqueue the work unit to the work unit queue associated with the one of the programmable processing cores; and
dequeue the work unit from the work unit queue to the one of the programmable processing cores for processing.
4. The device of claim 1 , wherein, to process the work unit, the one of the programmable processing cores is configured to:
receive the work unit from the work unit queue associated with the one of the programmable processing cores;
retrieve the one or more of the stream data units associated with the work unit from a cache memory of the one of the programmable processing cores;
execute the software function specified by the work unit to process the one or more of the stream data units; and
output the results of processing the work unit to the work unit queues, wherein the results include one or more new work unit messages.
5. The device of claim 1 , wherein the integrated circuit further comprising:
a coherent memory manager configured to control access to a coherent cache memory of the integrated circuit; and
a non-coherent memory manager configured to control access to a non-coherent buffer memory of the integrated circuit, wherein each of the programmable processing cores is connected to the coherent memory manager and the non-coherent memory manager, and wherein each of the programmable processing cores is configured to store the stream data units in the non-coherent buffer memory and store other data in the coherent cache memory.
6. The device of claim 5 , wherein, to process the work unit, the one of the programmable processing cores is configured to retrieve the one or more of the stream data units associated with the work unit from the non-coherent buffer memory via the non-coherent memory manager.
7. The device of claim 1 , wherein the software function invoked to process the work unit comprises one of a plurality of software functions included in a function library provided by the data plane operating system, and, wherein the plurality of software functions included in the function library include one or more network functions, one or more storage functions, one or more security functions, and one or more analytics functions.
8. The device of claim 1 , further comprising:
a multi-tasking control plane operating system configured to execute on one or more of the plurality of programmable processing cores; and
one or more control plane service agents configured to execute on the control plane operating system, the control plane service agents configured to perform set up and tear down of software structures to support the work unit processing performed by the software function executing on the data plane operating system.
9. The device of claim 1 ,
wherein the at least one interface comprises a network interface configured to send and receive the stream data units with a network, and
wherein the integrated circuit further comprises a networking unit configured to support the network interface to connect directly to the network without a separate network interface card (NIC), the networking unit configured to control input and output of the stream data units between the device and the network.
10. The device of claim 1 ,
wherein the at least one interface comprises a host interface configured to send and receive the stream data units with an application processor or a storage device, and
wherein the integrated circuit further comprises at least one host unit configured to support the host interface to connect directly to the application processor or the storage device, the host unit configured to at least one of control input and output of the stream data units between the device and the application processor or control storage of the stream data units with the storage device.
11. A device comprising:
an integrated circuit having at least one interface configured to send and receive stream data units and a plurality of programmable processing cores;
a run-to-completion data plane operating system configured to execute on one or more of the plurality of programmable processing cores;
a run-to-completion software function invoked for execution on the data plane operating system on one of the programmable processing cores to process a work unit, wherein the work unit is associated with one or more of the stream data units;
a multi-tasking control plane operating system configured to execute on one or more of the plurality of programmable processing cores; and
one or more control plane service agents configured to execute on the control plane operating system, the control plane service agents configured to perform set up and tear down of software structures to support the work unit processing performed by the software function executing on the data plane operating system.
12. The device of claim 11 , wherein the device comprises one of a compute node or a storage node.
13. The device of claim 11 , wherein the integrated circuit further comprises:
a plurality of work unit queues, wherein each work unit queue of the plurality of work unit queues is associated with one of the programmable processing cores and configured to store a plurality of work units enqueued for processing on the one of the programmable processing cores; and
a queue manager configured to, upon dequeuing the work unit from the work unit queue associated with the one of the programmable processing cores, invoke the software function specified by the work unit for execution on the data plane operating system on the one of the programmable processing cores specified by the work unit for processing the one or more of the stream data units.
14. The device of claim 11 , further comprising a control plane software stack configured to execute on the data plane operating system on the one or more of the programmable processing cores, wherein the control plane software stack comprises a hypervisor and the multi-tasking control plane operating system configured to execute on the hypervisor.
15. The device of claim 11 , wherein at least one of the programmable processing cores executing the control plane operating system comprises an independent processing core dedicated to the control plane operating system.
16. The device of claim 11 , wherein the stream data units comprise data packets, and wherein the control plane service agents are further configured to:
determine that a packet flow of the data packets is legitimate; and
send an instruction to the data plane operating system executing on the one or more of the programmable processing cores to set up the packet flow in a flow table.
17. The device of claim 16 , wherein the data plane operating system executing on the one or more of the programmable processing cores is configured to:
receive the packet flow of the data packets;
perform a lookup in the flow table to determine that the packet flow is legitimate; and
map the packet flow to the one of the programmable processing cores for serialized processing of the data packets of the packet flow.
18. The device of claim 11 ,
wherein the at least one interface comprises a network interface configured to send and receive the stream data units with a network, and
wherein the integrated circuit further comprises a networking unit configured to support the network interface to connect directly to the network without a separate network interface card (NIC), the networking unit configured to control input and output of the stream data units between the device and the network.
19. The device of claim 11 ,
wherein the at least one interface comprises a host interface configured to send and receive the stream data units with an application processor or a storage device, and
wherein the integrated circuit further comprises at least one host unit configured to support the host interface to connect directly to the application processor or the storage device, the host unit configured to at least one of control input and output of the stream data units between the device and the application processor or control storage of the stream data units with the storage device.
20. A system comprising:
a network;
at least one of an application processor or a storage device; and
a device configured to send and receive stream data units with the network and the at least one of the application processor or the storage device, the device comprising:
an integrated circuit comprising:
at least one interface configured to send and receive stream data units,
a plurality of programmable processing cores, and
a plurality of work unit queues, wherein each work unit queue of the plurality of work unit queues is associated with one of the programmable processing cores and configured to store a plurality of work units enqueued for processing on the one of the programmable processing cores, wherein each work unit of the plurality of work units is associated with one or more of the stream data units; and
a run-to-completion data plane operating system configured to execute on at least the one of the programmable processing cores,
wherein the integrated circuit further comprises a queue manager configured to, upon dequeuing the work unit from the work unit queue associated with the one of the programmable processing cores, invoke a software function specified by the work unit for execution on the data plane operating system on the one of the programmable processing cores specified by the work unit for processing the one or more of the stream data units.