IP Library Granted Patent US 11,467,956
Granted Patent B2
US 11,467,956 · App. 16/951,448 · Granted Oct 11, 2022

Method and system of resource-saving metadata update and verification in garbage collection

Inventor: Shu Li (Sunnyvale, CA)
Assignee: Alibaba Group Holding Limited
G06F12/0253G06F9/5022G06F12/0246G06F12/1009G06F2209/5011G06F2212/2022G06F2212/7201G06F2212/7205
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Quick Facts
Patent No.
US 11,467,956
App. No.
16/951,448
Granted
Oct 11, 2022
Kind
B2
Abstract

The present disclosure provides methods, systems, and non-transitory computer readable media for optimizing data storing. An exemplary method comprises: determining, by a host, a source physical storage to be released as a part of the garbage collection process and a destination physical storage to store data transferred from the source physical storage as a part of the garbage collection process; reading a logic address log corresponding to the data from the source physical storage to a controller, wherein the logic address log comprises logic addresses corresponding to the data; determining, by the controller, whether the logic addresses are valid; transferring the valid logic addresses to the host; and updating a mapping table with destination physical addresses according to the valid logic addresses, wherein: the mapping table is stored in the host, and the destination physical addresses correspond to the destination physical storage.

Claims (87)

1. A method to perform a garbage collection process, comprising:

determining, by a host, a source physical storage to be released as a part of the garbage collection process and a destination physical storage to store data transferred from the source physical storage as a part of the garbage collection process;

reading a logic address log corresponding to the data from the source physical storage to a controller, wherein the logic address log comprises logic addresses in the source physical storage where the data is to be transferred from as part of the garbage collection process;

determining, by the controller, whether the logic addresses are valid, comprising:

transferring a page map from the host to the controller, wherein the page map includes information of whether the logic addresses are valid; and

determining whether the logic addresses are valid according to the page map, comprising:

augmenting valid bits stored in the page map to a length of the logic addresses, wherein each of the valid bits denotes whether a logic address of the logic addresses is valid:

performing a bit-wise AND operation on the logic addresses with the augmented valid bits; and

determining whether the logic addresses are valid according to results from the bit-wise AND operation;

transferring the valid logic addresses to the host; and

updating a mapping table with destination physical addresses according to the valid logic addresses, wherein:

the mapping table is stored in the host, and

the destination physical addresses correspond to the destination physical storage.

2. The method of claim 1 , further comprising:

transferring the destination physical addresses from the host to the controller;

reading the data and corresponding logic addresses stored in the source physical storage to the controller; and

writing the data to the destination physical storage according to the destination physical addresses.

3. The method of claim 2 , further comprising:

storing the data and the corresponding logic addresses read from the source physical storage into a buffer, wherein the buffer is stored in the controller; and

performing noise removal on the data.

4. The method of claim 2 , further comprising:

determining whether the logic addresses read from the source physical storage match the valid logic addresses; and

writing the data to the destination physical storage according to the destination physical addresses further comprises:

writing the data to the destination physical storage according to the destination physical addresses in response to a determination that the logic addresses read from the source physical storage match the valid logic addresses.

5. The method of claim 4 , further comprising:

in response to a determination that the logic addresses read from the source physical storage do not match the valid logic addresses:

sending an error message to the host, and

marking the source physical storage as read-only.

6. The method of claim 2 , further comprising:

releasing the source physical storage to a pool of free physical storages.

7. The method of claim 1 , wherein:

the source physical storage and the destination physical storage are NAND blocks in a flash drive;

the controller is a flash drive controller corresponding to the flash drive; and

the host comprises a flash translation layer corresponding to the flash drive.

8. The method of claim 7 , wherein:

the logic addresses are logic block addresses; and

the physical addresses are physical block addresses.

9. A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a system to cause the system to perform a method of a garbage collection process, the method comprising:

determining, by a host, a source physical storage to be released as a part of the garbage collection process and a destination physical storage to store data transferred from the source physical storage as a part of the garbage collection process;

reading a logic address log corresponding to the data from the source physical storage to a controller, wherein the logic address log comprises logic addresses in the source physical storage where the data is to be transferred from as part of the garbage collection process;

determining, by the controller, whether the logic addresses are valid, comprising:

transferring a page map from the host to the controller, wherein the page map includes information of whether the logic addresses are valid; and

determining whether the logic addresses are valid according to the page map, comprising:

augmenting valid bits stored in the page map to a length of the logic addresses, wherein each of the valid bits denotes whether a logic address of the logic addresses is valid;

performing a bit-wise AND operation on the logic addresses with the augmented valid bits; and

determining whether the logic addresses are valid according to results from the bit-wise AND operation;

transferring the valid logic addresses to the host; and

updating a mapping table with destination physical addresses according to the valid logic addresses, wherein:

the mapping table is stored in the host, and

the destination physical addresses correspond to the destination physical storage.

10. A system for performing a garbage collection process, comprising:

a host;

a source physical storage configured to be released as a part of the garbage collection process;

a destination physical storage configured to store data transferred from the source physical storage as a part of the garbage collection process;

a controller communicatively coupled to the host, the source physical storage, and the destination physical storage, the controller is configured to:

read a logic address log corresponding to the data from the source physical storage, wherein the logic address log comprises logic addresses in the source physical storage where the data is to be transferred from as part of the garbage collection process;

determine whether the logic addresses are valid, wherein the controller is configured to:

transfer a page map from the host to the controller, wherein the page map includes information of whether the logic addresses are valid; and

determine whether the logic addresses are valid according to the page map, wherein the controller is configured to:

augment valid bits stored in the page map to a length of the logic addresses, wherein each of the valid bits denotes whether a logic address of the logic addresses is valid:

perform a bit-wise AND operation on the logic addresses with the augmented valid bits; and

determine whether the logic addresses are valid according to results from the bit-wise AND operation; and

transfer the valid logic addresses to the host, wherein:

the host is configured to update a mapping table with destination physical addresses according to the valid logic addresses,

the mapping table is stored in the host, and

the destination physical addresses correspond to the destination physical storage.

11. The system of claim 10 , wherein:

the host is configured to transfer the destination physical addresses from the host to the controller; and

the controller is further configured to:

read the data and corresponding logic addresses stored in the source physical storage to the controller; and

write the data to the destination physical storage according to the destination physical addresses.

12. The method of claim 11 , wherein the controller is further configured to:

store the data and the corresponding logic addresses read from the source physical storage into a buffer, wherein the buffer is stored in the controller; and

perform noise removal on the data.

13. The system of claim 11 , wherein the controller is further configured to:

determine whether the logic addresses read from the source physical storage match the valid logic addresses; and

write the data to the destination physical storage according to the destination physical addresses in response to a determination that the logic addresses read from the source physical storage match the valid logic addresses.

14. The system of claim 13 , wherein the controller is further configured to:

in response to a determination that the logic addresses read from the source physical storage do not match the valid logic addresses, send an error message to the host.

15. The system of claim 11 , wherein the system is further configured to release the source physical storage to a pool of free physical storages.

16. The system of claim 10 , wherein:

the source physical storage and the destination physical storage are NAND blocks in a flash drive;

the controller is a flash drive controller corresponding to the flash drive; and

the host comprises a flash translation layer corresponding to the flash drive.

17. The system of claim 16 , wherein:

the logic addresses are logic block addresses; and

the physical addresses are physical block addresses.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2026
From: ALIBABA GROUP HOLDING LIMITED
To: CLOUD INTELLIGENCE ASSETS HOLDING (SINGAPORE) PRIVATE LIMITED
Reel/Frame 075499/0384 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 25, 2020
From: LI, SHU
To: ALIBABA GROUP HOLDING LIMITED
Reel/Frame 054466/0165 →
Continuity (1)
Related Publication 20220156183A1 · May 19, 2022