IP Library Granted Patent US 11,297,713
Granted Patent B2
US 11,297,713 · App. 16/953,673 · Granted Apr 5, 2022

Reference metal layer for setting the impedance of metal contacts of a connector

Inventors: Manhtien V. Phan (Morgan Hill, CA); Mau-Lin Chou (Milpitas, CA); Chih-Hao Lee (NewTaipei, TW)
Assignee: Super Micro Computer, Inc.
H05K1/0253H05K1/0298H05K2201/093
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Quick Facts
Patent No.
US 11,297,713
App. No.
16/953,673
Granted
Apr 5, 2022
Kind
B2
Abstract

A circuit board has an electrical circuit and a connector that is attached to the circuit board. The connector has metal contacts. A housing of the connector has an embedded reference metal layer that is disposed under a single-ended metal contact or differential metal contacts. The reference metal layer sets the impedance of the single-ended metal contact or the differential metal contacts.

Claims (9)

1. A circuit board comprising:

a substrate; and

a connector that is attached to the substrate, the connector comprising a housing, a reference metal layer that is embedded within the housing, and a plurality of metal contacts,

wherein adjacent first and second metal contacts of the plurality of metal contacts are configured to carry a differential signal and are connected to corresponding differential signal traces on the circuit board, the reference metal layer is under and between the first and second metal contacts, and the reference metal layer is configured to set a differential impedance of the first and second metal contacts,

wherein the reference metal layer is electrically floating.

2. The circuit board of claim 1 , wherein each of the plurality of metal contacts has a pad portion and a lead portion, the pad portion being configured to make a removable electrical connection with a contactor of another connector of another circuit board, and the lead portion is connected to an electrical node on the circuit board.

3. The circuit board of claim 1 , further comprising an electrical circuit that is mounted on the circuit board.

4. The circuit board claim 2 , wherein the electrical circuit comprises solid-state memory.

5. The circuit board of claim 1 , wherein the reference metal layer is narrower than a spanning distance between outer side perimeters of the first and second metal contacts.

Assignments (2)
SECURITY INTEREST Recorded Jan 20, 2026
From: SUPER MICRO COMPUTER, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 074447/0643 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2020
From: PHAN, MANHTIEN V.; CHOU, MAU-LIN; LEE, CHIH-HAO
To: SUPER MICRO COMPUTER, INC.
Reel/Frame 054577/0834 →
Continuity (3)
Continuation In Part 17070167 · Oct 14, 2020
Continuation 16750686 · Jan 23, 2020
Related Publication 20210235577A1 · Jul 29, 2021