IP Library Granted Patent US 11,360,838
Granted Patent B2
US 11,360,838 · App. 16/970,855 · Granted Jun 14, 2022

Electronic control device and preferential error detection method of configuration memory

Inventors: Kenichi Shimbo (Tokyo, JP); Tadanobu Toba (Tokyo, JP); Taisuke Ueta (Tokyo, JP); Hideyuki Sakamoto (Hitachinaka, JP)
Assignee: Hitachi Astemo, Ltd.
G06F11/0763G06F11/1004G06F11/142H03K19/1776
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Quick Facts
Patent No.
US 11,360,838
App. No.
16/970,855
Granted
Jun 14, 2022
Kind
B2
Abstract

An electronic control device includes a rewritable configuration memory composed of a plurality of frames in which logic circuit information is stored, a reconfiguration control unit configured to rewrite the logic circuit information of the frames, a logic unit configured to form a logic circuit based on the logic circuit information stored in the frames, and a configuration memory diagnosis unit configured to read the logical circuit information stored in the frames of the configuration memory and to perform error detection which is detection of an error in the stored logic circuit information, in which when the frames are rewritten by the reconfiguration control unit, the configuration memory diagnosis unit performs the error detection of ones of the frames that are rewritten prior to ones of the frames that are not rewritten.

Claims (22)

1. An electronic control device comprising:

a rewritable configuration memory composed of a plurality of frames in which logic circuit information is stored;

a reconfiguration control unit configured to rewrite the logic circuit information of the frames;

a logic unit configured to form a logic circuit based on the logic circuit information stored in the frames; and

a configuration memory diagnosis unit configured to read the logical circuit information stored in the frames of the configuration memory and configured to perform preferential error detection which is detection of an error in the stored logic circuit information, wherein

while the reconfiguration control unit is rewriting frames, the configuration memory diagnosis unit is configured to interrupt a sequential error detection by jumping to an out of sequence frame number and performing error detection on the out of sequence frame number before returning to the sequential error detection, and

when the error detection of the out of sequence frame number has ended, the sequential error detection restarts from a same position where detection was previously interrupted.

2. The electronic control device according to claim 1 , wherein

the configuration memory diagnosis unit performs the error detection of: i) at least one of rewritten frames before at least one of not rewritten frames, and ii) the at least one of the rewritten frames at the same time when the reconfiguration control unit completes the rewriting of the frames.

3. The electronic control device according to claim 2 , wherein

the configuration memory diagnosis unit includes:

a code calculation unit configured to calculate an error detection code using the logic circuit information written in the frames; and

a comparison unit configured to determine whether the error detection code calculated by the code calculation unit matches a matching error detection code calculated in advance, and wherein

the electronic control device further includes:

a matching code calculation unit configured to, when the reconfiguration control unit writes the logic circuit information in the configuration memory, calculate the matching error detection code using the logic circuit information written by the reconfiguration control unit.

4. The electronic control device according to claim 2 , wherein

while the reconfiguration control unit performs the rewriting, the configuration memory diagnosis unit performs the error detection of the at least one of ones of the not rewritten frames by the reconfiguration control unit.

5. The electronic control device according to claim 2 , wherein

the configuration memory diagnosis unit performs a continuous detection in which the error detection of the frames is performed in an order of address code of the configuration memory until the reconfiguration control unit performs the rewriting of the frames, and when the reconfiguration control unit performs the rewriting of the frames, interrupts the continuous detection and performs the error detection of ones of the frames that are rewritten by the reconfiguration control unit, and restarts the continuous detection from one of the frames at which the interruption occurs when the error detection of the at least one of the rewritten frames by the reconfiguration control unit is completed.

6. An error detection method for a rewritable configuration memory composed of a plurality of frames, the method comprising:

interrupting a sequential error detection, with a configuration memory diagnosis unit, while a reconfiguration control unit is rewriting frames, by jumping to an out of sequence frame number and performing error detection on the out of sequence frame number before returning to the sequential error detection; and

when the error detection of the out of sequence frame number has ended, restarting the sequential error detection from a same position where detection was previously interrupted.

Assignments (2)
CHANGE OF NAME Recorded Nov 30, 2021
From: HITACHI AUTOMOTIVE SYSTEMS, LTD.
To: HITACHI ASTEMO, LTD.
Reel/Frame 058481/0935 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2021
From: SHIMBO, KENICHI; TOBA, TADANOBU; UETA, TAISUKE; SAKAMOTO, HIDEYUKI
To: HITACHI AUTOMOTIVE SYSTEMS, LTD.
Reel/Frame 054848/0153 →