IP Library Granted Patent US 11,587,951
Granted Patent B2
US 11,587,951 · App. 16/972,130 · Granted Feb 21, 2023

Semiconductor device

Inventors: Takayuki Oshima (Hitachinaka, JP); Katsumi Ikegaya (Hitachinaka, JP); Masato Kita (Hitachinaka, JP); Keishi Komoriyama (Hitachinaka, JP); Kiyotaka Kanno (Hitachinaka, JP); Shinichirou Wada (Tokyo, JP)
Assignee: HITACHI ASTEMO, LTD.
H01L27/1203B60R16/0231H01L27/11575
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Quick Facts
Patent No.
US 11,587,951
App. No.
16/972,130
Granted
Feb 21, 2023
Kind
B2
Abstract

Provided are a semiconductor device having small characteristic variations with time and high reliability and an in-vehicle control device using the same, the semiconductor device including a plurality of transistor elements constituting a current mirror circuit or a differential amplifier circuit that requires high relative accuracy. A semiconductor device includes a first metal-oxide-semiconductor (MOS) transistor, a second MOS transistor paired with the first MOS transistor, and insulation separation walls which insulate and separate elements from each other, wherein relative characteristics of the first MOS transistor and the second MOS transistor are in a predetermined range, the first MOS transistor and the second MOS transistor are relatively arranged in a gate width direction or a gate length direction, and distances between gate oxide films of the first MOS transistor and the second MOS transistor and the insulation separation walls facing the gate oxide films are the same as each other in a direction perpendicular to the gate width direction or the gate length direction.

Claims (18)

1. A semiconductor device, comprising:

a first metal-oxide-semiconductor (MOS) transistor;

a second MOS transistor paired with the first MOS transistor;

a first set of insulation separation walls that insulate and separate at least one element of the first MOS transistor from the second MOS transistor; and

a second set of insulation separation walls that insulate and separate at least one element of the second MOS transistor from the first MOS transistor,

wherein:

relative characteristics of the first MOS transistor and the second MOS transistor are in a predetermined range,

the first MOS transistor and the second MOS transistor are relatively arranged in a gate width direction or a gate length direction, and

distances between gate oxide films of the first MOS transistor and the second MOS transistor and the first set of insulation separation walls and the second set of insulation separation walls, respectively, are the same as each other in a direction perpendicular to the gate width direction and in a direction perpendicular to the gate length direction.

2. The semiconductor device of claim 1 , wherein at least one of a distance between the gate oxide film of the first MOS transistor and the first set of insulation separation walls and a distance between the gate oxide film of the second MOS transistor and the second set of insulation separation walls is 25 μm or less.

3. The semiconductor device of claim 1 , wherein the second MOS transistor is composed of a transistor group in which a plurality of MOS transistors are connected to each other in parallel.

4. The semiconductor device of claim 1 , wherein each of the first MOS transistor and the second MOS transistor is composed of a transistor group in which a plurality of MOS transistors are connected to each other in parallel.

5. The semiconductor device of claim 1 , wherein:

the first set of insulation separation walls surround the first MOS transistor; and

the second set of insulation separation walls surround the second MOS transistor.

6. The semiconductor device according to claim 5 , wherein the first MOS transistor and the second MOS transistor are arranged so that a gate length direction of the first MOS transistor and a gate length direction of the second MOS transistor are orthogonal to each other.

7. The semiconductor device of claim 1 , wherein the first MOS transistor, the second MOS transistor, the first set of insulation separation walls, and the second set of insulation separation walls are arranged on a silicon on insulator (SOI) substrate.

8. The semiconductor device of claim 1 , wherein the semiconductor device is an in-vehicle semiconductor device mounted in an in-vehicle control device.

Assignments (2)
CHANGE OF NAME Recorded Sep 2, 2021
From: HITACHI AUTOMOTIVE SYSTEMS, LTD.
To: HITACHI ASTEMO, LTD.
Reel/Frame 057655/0824 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 4, 2020
From: OSHIMA, TAKAYUKI; IKEGAYA, KATSUMI; KITA, MASATO; KOMORIYAMA, KEISHI; KANNO, KIYOTAKA; WADA, SHINICHIROU
To: HITACHI AUTOMOTIVE SYSTEMS, LTD.
Reel/Frame 054544/0744 →
Priority Claims (1)
JP JP2018-115337 · Jun 18, 2018 · national
Continuity (1)
Related Publication 20210233935A1 · Jul 29, 2021