IP Library Granted Patent US 11,444,533
Granted Patent B2
US 11,444,533 · App. 16/989,232 · Granted Sep 13, 2022

System and method for power stage current-sense accuracy improvement in a power system

Inventors: Feng-Yu Wu (Taipei, TW); Guangyong Zhu (Austin, TX); Shiguo Luo (Austin, TX)
Assignee: Dell Products L.P.
H02M3/158H02M1/0009
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Quick Facts
Patent No.
US 11,444,533
App. No.
16/989,232
Granted
Sep 13, 2022
Kind
B2
Abstract

A power stage includes a power converter having high- and low-side switches, a driver circuit that drives the switching power converter based upon a PWM signal, and a current sensing circuit that detects a low-side current level on the low-side switch, and provides a current level signal that includes the low-side current level. The power stage turns on the low-side switch at a first time, and estimates a first low-side current level at the first time. In estimating the first low-side current level, the power stage detects a second low-side current level at a second time while the low-side switch is turned on, the second time being after the first time, and detects a third low-side current level at a third time while the low-side switch is turned on, wherein the third time is after the second time. The first low-side current level is estimated based upon the second and third low-side current levels.

Claims (49)

1. A power system for an information handling system, the power system comprising:

a power control module configured to receive a current level signal and to provide a pulse-width modulation (PWM) signal in response to the current level signal; and

a power stage including a switching power converter having a high-side switch and a low-side switch, a driver circuit configured to receive the PWM signal and to drive the switching power converter based upon the PWM signal, and a current sensing circuit configured to detect a low-side current level on the low-side switch, and to provide the current level signal, wherein the current level signal includes the low-side current level;

wherein the power system is configured to turn on the low-side switch at a first time, and to estimate a first low-side current level at the first time, wherein in estimating the first low-side current level, the power system is further configured to detect a second low-side current level at a second time while the low-side switch is turned on, the second time being a first duration of time after the first time, and to detect a third low-side current level at a third time while the low-side switch is turned on, wherein the third time is a second duration of time after the second time, wherein the first low-side current level is estimated based upon the second and third low-side current levels, to determine a current difference between the second low-side current level and the third low-side current level, and to divide the current difference by the second duration of time;

wherein the first low-side current level is estimated as:

I1=(k×ΔI)+I2, where I1 is the estimated first low-side current level, I2 is the second low-side current level, ΔI is the current difference, and:

k=T1/T2, where T1 is the first duration of time, and T2 is the second duration of time.

2. The power system of claim 1 , wherein the first duration of time is provided to permit noise on the low-side switch to subside.

3. The power system of claim 1 , wherein the first duration of time is equal to the second duration of time.

4. The power system of claim 3 , wherein the first low-side current level is estimated as the sum of the second current level and the current difference.

5. The power system of claim 1 , wherein the first duration of time is different from the second duration of time.

6. The power system of claim 1 , wherein the power stage provides the estimate.

7. The power system of claim 1 , wherein the power control module provides the estimate.

8. The power system of claim 1 , wherein the current sensing circuit includes a resistor to provide an indication of a load inductance.

9. The power system of claim 1 , wherein the power system is further configured to apply the estimate of the first low-side current level on a subsequent cycle of the PWM signal.

10. A method, comprising:

receiving, by a power control module of a power system, a current level signal;

providing, by the power control module, a pulse-width modulation (PWM) signal in response to the current level signal;

receiving, by a driver circuit of a power stage of the power system, the PWM signal, wherein the power stage includes a switching power converter having a high-side switch and a low-side switch;

driving, by the driver circuit, the switching power converter based upon the PWM signal;

detecting, by a current sensing circuit of the power stage, a low-side current level on the low-side switch;

providing, by the current sensing circuit, the current level signal, wherein the current level signal includes the low-side current level;

turning on the low-side switch at a first time; and

estimating the first low-side current level at the first time, wherein in estimating the low-side current level, the method further comprises:

detecting a second low-side current level at a second time while the low-side switch is turned on, the second time being a first duration of time after the first time;

detecting a third low-side current level at a third time while the low-side switch is turned on, wherein the third time is a second duration of time after the second time, and wherein the first low-side current level is estimated based upon the second and third low-side current levels;

determining a current difference between the second low-side current level and the third low-side current level; and

dividing the current difference by a second duration of time between the second time and the third time;

wherein the first low-side current level is estimated as:

I1=(k×ΔI)+I2, where I1 is the estimated first low-side current level, I2 is the second low-side current level, ΔI is the current difference, and:

k=T1/T2, where T1 is the first duration of time, and T2 is the second duration of time.

11. The method of claim 10 , further comprising:

providing the first duration of time to permit noise on the low-side switch to subside.

12. The method of claim 10 , wherein the first duration of time is equal to the second duration of time.

13. The method of claim 12 , wherein the first low-side current level is estimated as the sum of the second current level and the current difference.

14. The method of claim 10 , wherein the first duration of time is different from the second duration of time.

15. The method of claim 10 , wherein the estimate is provided by one of the power control module and the power stage.

16. The method of claim 10 , further comprising receiving, by the current sensing circuit, an indication of a load inductance from a resistor.

17. The method of claim 10 , further comprising applying the estimate of the first low-side current level on a subsequent cycle of the PWM signal.

18. A power stage comprising:

a switching power converter having a high-side switch and a low-side switch;

a driver circuit configured to receive a pulse-width modulated (PWM) signal and to drive the switching power converter based upon the PWM signal; and

a current sensing circuit configured to detect a low-side current level on the low-side switch, and to provide the current level signal, wherein the current level signal includes the low-side current level;

wherein the power stage is configured turn on the low-side switch at a first time, and to estimate a first low-side current level at the first time, wherein in estimating the first low-side current level, the power stage is further configured to detect a second low-side current level at a second time while the low-side switch is turned on, the second time being a first duration of time after the first time, and to detect a third low-side current level at a third time while the low-side switch is turned on, wherein the third time is a second duration of time after the second time, wherein the first low-side current level is estimated based upon the second and third low-side current levels, to determine a current difference between the second low-side current level and the third low-side current level, and to divide the current difference by the second duration of time;

wherein the first low-side current level is estimated as:

I1=(k×ΔI)+I2, where I1 is the estimated first low-side current level, I2 is the second low-side current level, ΔI is the current difference, and:

k=T1/T2, where T1 is the first duration of time, and T2 is the second duration of time.

19. The power stage of claim 18 , wherein the current sensing circuit includes a resistor to provide an indication of a load inductance.

20. The power stage of claim 18 , wherein the power system is further configured to apply the estimate of the first low-side current level on a subsequent cycle of the PWM signal.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (054475/0523) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 060332/0664 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (054475/0434) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 060332/0740 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (054475/0609) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0570 →
RELEASE OF SECURITY INTEREST AT REEL 054591 FRAME 0471 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0463 →
SECURITY INTEREST Recorded Nov 18, 2020
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 054475/0609 →
SECURITY INTEREST Recorded Nov 18, 2020
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 054475/0434 →
SECURITY INTEREST Recorded Nov 18, 2020
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 054475/0523 →
SECURITY AGREEMENT Recorded Nov 13, 2020
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 054591/0471 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2020
From: WU, FENG-YU; ZHU, GUANGYONG; LUO, SHIGOU
To: DELL PRODUCTS, LP
Reel/Frame 053446/0199 →