IP Library Granted Patent US 11,664,731
Granted Patent B2
US 11,664,731 · App. 16/992,781 · Granted May 30, 2023

Configurable-speed multi-phase DC/DC switching converter with hysteresis-less phase shedding and inductor bypass

Inventors: Anatoly Gelman (San Diego, CA); Taner Dosluoglu (New York, NY); Bertrand Diotte (San Diego, CA)
Assignee: CHAOYANG SEMICONDUCTOR (SHANGHAI) CO., LTD.
H02M3/1584G05F1/59H03K5/24H02M1/0009H02M1/0025H02M3/1566
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Quick Facts
Patent No.
US 11,664,731
App. No.
16/992,781
Granted
May 30, 2023
Kind
B2
Abstract

Some embodiments provide a multi-phase DC/DC switching converter in which each of the phases are controlled using a common comparator for comparing an output voltage of the switching converter and a reference voltage, with in some embodiments each of the phases including a bypass switch for coupling ends of an output inductor of the switching converter. Some embodiments provide a multi-phase DC/DC switching converter in which some of the phases are operated with clock signals having frequencies different than clock signals used for operating others of the phases. Some embodiments provide a multi-phase DC/DC switching converter in which some of the phases include inductors having inductances different than inductances for inductors of others of the phases.

Claims (23)

1. A multi-phase DC/DC switching converter comprising:

a plurality of phases, with each phase of the plurality of phases including at least one high side switch and at least one low side switch coupled in series between an input voltage source and a lower voltage source, an output inductor with a first end coupled to a node between the at least one high side switch and the at least one low side switch and a second end providing an output, and a bypass switch coupling the first end and the second end of the output inductor, with a nominal inductance of at least one of the output inductors different than nominal inductance of at least one other of the output inductors;

a comparator for comparing voltage of the output voltage and a reference voltage; and

a controller configured to command operation of the at least one high side switch, the at least one low side switch, and the bypass switch of each phase of the plurality of phases based on an output of the comparator and a clock signal, the clock signal being one of a plurality of different clock signals differing in frequency for at least some of the phases of the plurality of phases;

wherein sizes of the at least one high side switch of different ones of the phases of the plurality of phases differ in relation to differences in frequency for the clock signal to be used in operating the at least one high side switch, the at least one low side switch, and the bypass switch of different ones of the phases of the plurality of phases.

2. The multi-phase DC/DC switching converter of claim 1 , wherein sizes of the at least one high side switch of different ones of the phases of the plurality of phases differ in relation to differences in inductance of the output inductors of the different ones of the phases of the plurality of phases.

3. A multi-phase DC/DC switching converter, comprising:

a plurality of phases, with each phase of the plurality of phases including at least one high side switch and at least one low side switch coupled in series between an input voltage source and a lower voltage source, an output inductor with a first end coupled to a node between the at least one high side switch and the at least one low side switch and a second end providing an output, and a bypass switch coupling the first end and the second end of the output inductor, with inductance of at least one of the output inductors different than inductance of at least one other of the output inductors;

a first comparator for comparing output voltage and a reference voltage;

an additional comparator for comparing output voltage and the reference voltage plus a threshold; and

a controller configured to command operation of the at least one high side switch, the at least one low side switch, and the bypass switch of some of the phases of the plurality of phases based on an output of the first comparator and at least a first clock signal, to command operation of the at least one high side switch, the at least one low side switch, and the bypass switch of one or more others of the phases of the plurality of phases based on an output of the additional comparator and at least a second clock signal, the second clock signal differing in frequency from the first clock signal.

4. The multi-phase DC/DC switching converter of claim 3 , wherein sizes of the at least one high side switch of different ones of the phases of the plurality of phases differ in relation to differences in inductance of the output inductors of the different ones of the phases of the plurality of phases.

5. The multi-phase DC/DC switching converter of claim 3 , wherein the sizes of the at least one high side switch of different ones of the phases of the plurality of phases differ in relation to differences in frequency for the clock signal to be used in operating the at least one high side switch, the at least one low side switch, and the bypass switch of different ones of the phases of the plurality of phases.

6. The multi-phase DC/DC switching converter of claim 5 , wherein sizes of the at least one high side switch of different ones of the phases of the plurality of phases differ in relation to differences in inductance of the output inductors of the different ones of the phases of the plurality of phases.

7. The multi-phase DC/DC switching converter of claim 3 , wherein the controller is configured to command operation of the at least one high side switch, the at least one low side switch, and the bypass switch of the one or more others of the phases of the plurality of phases only in a discontinuous conduction mode (DCM) of operation.

8. The multi-phase DC/DC switching converter of claim 3 , wherein the controller is configured to command operation of the at least one high side switch, the at least one low side switch, and the bypass switch of the some of the phases of the plurality of phases only in a discontinuous conduction mode (DCM) of operation.

9. The multi-phase DC/DC switching converter of claim 3 wherein the first clock frequency is lower than the second clock frequency.

10. The multi-phase DC/DC switching converter of claim 9 , wherein the controller is configured to determine relative inductance of the output inductors of the plurality of phases.

11. The multi-phase DC/DC switching converter of claim 10 , wherein the controller is configured to change a duty cycle of operation of the at least one high side switch, the at least one low side switch, and the bypass switch based on the determined relative inductance of the output inductors of the plurality of phases.

12. The multi-phase DC/DC switching converter of claim 10 , wherein the controller is configured to select at least one clock signal for use in operating the at least one high side switch, the at least one low side switch, and the bypass switch of at least one phase of the plurality of phases based on the determined relative inductance of the output inductors of the plurality of phases.

13. The multi-phase DC/DC switching converter of claim 3 , wherein output inductors of the some of the phases of the plurality of phases have larger inductances than output inductors of the one or more others of the phases of the plurality of phases.

14. The multi-phase DC/DC switching converter of claim 13 , wherein output inductors of the some of the phases of the plurality of phases have a same nominal inductance as output inductors of the one or more others of the phases of the plurality of phases.

15. The multi-phase DC/DC switching converter of claim 13 , wherein output inductors of the some of the phases of the plurality of phases have a different nominal inductance than output inductors of the one or more others of the phases of the plurality of phases.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2023
From: CHAOYANG SEMICONDUCTOR (SHANGHAI) CO., LTD.
To: ENDURA IP HOLDINGS LTD.
Reel/Frame 063424/0226 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2022
From: GELMAN, ANATOLY; DOSLUOGLU, TANER; DIOTTE, BERTRAND
To: ENDURA TECHNOLOGIES (INTERNATIONAL) LIMITED
Reel/Frame 061050/0277 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2022
From: ENDURA TECHNOLOGIES (INTERNATIONAL) LIMITED
To: CHAOYANG SEMICONDUCTOR JIANGYIN TECHNOLOGY CO., LTD.
Reel/Frame 061050/0315 →
CHANGE OF NAME Recorded Sep 9, 2022
From: CHAOYANG SEMICONDUCTOR JIANGYIN TECHNOLOGY CO., LTD.
To: CHAOYANG SEMICONDUCTOR (SHANGHAI) CO., LTD.
Reel/Frame 061406/0174 →
Continuity (2)
Provisional Application 62885992 · Aug 13, 2019
Related Publication 20210050789A1 · Feb 18, 2021