Voltage measurement device, voltage detection circuit, and device address generation method

1. A voltage measurement device, comprising:

a plurality of voltage detection circuits which measure cell voltages of a plurality of cells connected in series from a lowermost side to an uppermost side,

wherein each of the plurality of voltage detection circuits includes a lowermost voltage detection circuit, an uppermost voltage detection circuit and one or more middle voltage detection circuits disposed between the lowermost voltage detection circuit and the uppermost voltage detection circuit, each of the one or more middle voltage detection circuits includes:

a device address generating circuit which generates a device address according to a first address assignment command received from a preceding voltage detection circuit located at a preceding stage; and

an address assignment command generating circuit which generates a second address assignment command according to the first address assignment command, and sends the second address assignment command to a next voltage detection circuit located at a next stage,

the preceding voltage detection circuit is one of a lower voltage detection circuit located at a lower side or an upper voltage detection circuit located at an upper side among the plurality of voltage detection circuits, and the next voltage detection circuit is the other of the lower voltage detection circuit or the upper voltage detection circuit among the plurality of voltage detection circuits, and

the device address generating circuit generates a same device address for (i) the device address according to the first address assignment command received from the lower voltage detection circuit and (ii) the device address according to the first address assignment command received from the upper voltage detection circuit.

2. The voltage measurement device according to claim 1 ,

wherein

the address assignment command generating circuit:

generates the second address assignment command according to the first address assignment command received from the lower voltage detection circuit, and sends the second address assignment command to the upper voltage detection circuit, when the preceding voltage detection circuit is the lower voltage detection circuit; and

generates the second address assignment command according to the first address assignment command received from the upper voltage detection circuit, and sends the second address assignment command to the lower voltage detection circuit, when the preceding voltage detection circuit is the upper voltage detection circuit.

3. The voltage measurement device according to claim 1 ,

wherein the first address assignment command includes a data field.

4. The voltage measurement device according to claim 3 ,

wherein the device address generating circuit generates the device address using a value of the data field.

5. The voltage measurement device according to claim 3 ,

wherein the address assignment command generating circuit generates the second address assignment command obtained by decreasing or increasing a value of the data field.

6. The voltage measurement device according to claim 3 ,

wherein when the device address generating circuit receives the first address assignment command from the lower voltage detection circuit, the device address generating circuit outputs, as the device address, a value of the data field in the address assignment command received.

7. The voltage measurement device according to claim 3 ,

wherein when the device address generating circuit receives the first address assignment command from the upper voltage detection circuit, the device address generating circuit generates, as the device address, a value obtained by subtracting a value of the data field from a correction value.

8. The voltage measurement device according to claim 3 ,

wherein the address assignment command generating circuit generates the second address assignment command obtained by decreasing a value of the data field in the first address assignment command received from the lower voltage detection circuit.

9. The voltage measurement device according to claim 3 ,

wherein the address assignment command generating circuit generates the second address assignment command obtained by decreasing a value of the data field in the first address assignment command received from the upper voltage detection circuit.

10. The voltage measurement device according to claim 3 ,

wherein the address assignment command generating circuit generates the second address assignment command obtained by increasing a value of the data field in the first address assignment command received from the lower voltage detection circuit.

11. The voltage measurement device according to claim 3 ,

wherein the address assignment command generating circuit generates the second address assignment command obtained by increasing a value of the data field in the first address assignment command received from the upper voltage detection circuit.

12. The voltage measurement device according to claim 3 , wherein

when the device address generating circuit receives the first address assignment command from the lower voltage detection circuit, the device address generating circuit determines, as the device address, a value of the data field in the first address assignment command received, and the address assignment command generating circuit generates the second address assignment command obtained by decreasing a value of the data field in the first address assignment command received from the lower voltage detection circuit; and

when the device address generating circuit receives the first address assignment command from the upper voltage detection circuit, the device address generating circuit determines, as the device address, a value of the data field in the first address assignment command received, and the address assignment command generating circuit

generates the second address assignment command obtained by increasing a value of the data field in the first address assignment command received from the upper voltage detection circuit.

13. The voltage measurement device according to claim 1 , further comprising:

a controller which is connected to the lowermost voltage detection circuit located at a lowermost stage and the uppermost voltage detection circuit located at an uppermost stage, and sends the first address assignment command.

14. A voltage detection circuit which measures cell voltages of a plurality of cells connected in series from a lowermost side to an uppermost side, the voltage detection circuit being one of a plurality of voltage detection circuits included in a voltage measurement device, the voltage detection circuit comprising:

a device address generating circuit which generates a device address according to a first address assignment command received from a preceding voltage detection circuit located at a preceding stage; and

an address assignment command generating circuit which generates a second address assignment command according to the first address assignment command, and sends the second address assignment command to a next voltage detection circuit located at a next stage,

wherein the preceding voltage detection circuit is one of a lower voltage detection circuit located at a lower side or an upper voltage detection circuit located at an upper side among the plurality of voltage detection circuits, and the next voltage detection circuit is the other of the lower voltage detection circuit or the upper voltage detection circuit, and

the device address generating circuit generates a same device address for (i) the device address according to the first address assignment command received from the lower voltage detection circuit and (ii) the device address according to the first address assignment command received from the upper voltage detection circuit.

15. A device address generating method performed by a voltage measurement device which measures cell voltages of a plurality of cells connected in series and includes a plurality of voltage detection circuits, the device address generating method comprising:

generating a device address according to a first address assignment command received from a preceding voltage detection circuit located at a preceding stage; and

generating a second address assignment command according to the first address assignment command, and sending the second address assignment command to a next voltage detection circuit located at a next stage,

wherein the preceding voltage detection circuit is one of a lower voltage detection circuit located at a lower side or an upper voltage detection circuit located at an upper side among the plurality of voltage detection circuits, and the next voltage detection circuit is the other of the lower voltage detection circuit or the upper voltage detection circuit, and

the device address generating method comprises generating a same device address for (i) the device address according to the first address assignment command received from the lower voltage detection circuit and (ii) the device address according to the first address assignment command received from the upper voltage detection circuit.