Controlled power up and power down of multi-stage low drop-out regulators

1. A low dropout (LDO) regulator circuit having n stages, where n≥2, the LDO regulator circuit including:

(a) a primary reference voltage input;

(b) n−1 series-coupled dependent LDO stages each including an associated secondary reference voltage source coupled to the primary reference voltage input, and an associated LDO circuit including:

(1) a control input coupled to an input capacitor and to the associated secondary reference voltage source;

(2) an output coupled to an output capacitor;

(3) a power input coupled to one of the output of a previous n−1 series-coupled dependent LDO stage or configured to be coupled to a voltage source external to the LDO regulator circuit; and

(4) a transconductance amplifier having a first voltage input coupled to the primary reference voltage input, a second voltage input coupled to the associated secondary reference voltage source, and a current output coupled to the input capacitor, the transconductance amplifier configured to charge and/or discharge the input capacitor to a desired charge level; and

(c) an nth output LDO stage coupled to the primary reference voltage input and including an associated LDO circuit including (1) a control input coupled to an input capacitor and to the primary reference voltage input, (2) an output coupled to an output capacitor, and (3) a power input coupled to the output of one of the n−1 series-coupled dependent LDO stages.

2. The invention of claim 1 , wherein, for each stage, a charge and/or discharge time for the input capacitor is essentially independent of the value of the input capacitor.

3. The invention of claim 1 , wherein the transconductance amplifier of each stage is configured to charge the input capacitor in synchronism with a voltage present on the primary reference voltage input.

4. The invention of claim 1 , further including, for each stage, an output transconductance amplifier having a first voltage input coupled to the primary reference voltage input, a second voltage input coupled to the output of the stage, and a current output coupled to the output capacitor of the stage, the output transconductance amplifier configured to charge and/or discharge the output capacitor to a desired charge level.

5. The invention of claim 4 , wherein, for each stage, a charge and/or discharge time for each output capacitor is essentially independent of the value of the output capacitor.

6. The invention of claim 4 , wherein, for each stage, each output transconductance amplifier is configured to charge and/or discharge the output capacitor in synchronism with a voltage present on the primary reference voltage input.

7. A low dropout (LDO) regulator circuit including:

(a) a primary reference voltage input;

(b) a dependent LDO stage including a secondary reference voltage source coupled to the primary reference voltage input, and an associated LDO circuit including:

(1) a control input coupled to an input capacitor and to the secondary reference voltage source;

(2) an output coupled to an output capacitor;

(3) a power input configured to be coupled to a voltage source external to the LDO regulator circuit; and

(4) an input transconductance amplifier having a first voltage input coupled to the primary reference voltage input, a second voltage input coupled to the secondary reference voltage source, and a current output coupled to the input capacitor, the input transconductance amplifier configured to charge and/or discharge the input capacitor to a desired charge level; and

(c) an output LDO stage coupled to the primary reference voltage input and including an associated LDO circuit including (1) a control input coupled to an input capacitor and to the primary reference voltage input, (2) an output coupled to an output capacitor, and (3) a power input coupled to the output of the dependent LDO stage.

8. The invention of claim 7 , wherein a charge and/or discharge time for the input capacitor is essentially independently of the value of the input capacitor.

9. The invention of claim 7 , wherein the input transconductance amplifier of each stage is configured to charge and/or discharge the input capacitor in synchronism with a voltage present on the primary reference voltage input.

10. The invention of claim 7 , further including, for each stage, an output transconductance amplifier having a first voltage input coupled to the primary reference voltage input, a second voltage input coupled to the output of the stage, and a current output coupled to the output capacitor of the stage, the output transconductance amplifier configured to charge and/or discharge the output capacitor to a desired charge level.

11. The invention of claim 10 , wherein a charge and/or discharge time for the output capacitor is essentially independent of the value of the output capacitor.

12. The invention of claim 10 , wherein the input transconductance amplifier of each stage is configured to charge and/or discharge the input capacitor in synchronism with a voltage present on the primary reference voltage input.

13. The invention of claim 10 , wherein the output transconductance amplifier of each stage is configured to charge and/or discharge the output capacitor in synchronism with a voltage present on the primary reference voltage input.

14. The invention of claim 10 , wherein the input transconductance amplifier of each stage is configured to charge and/or discharge the input capacitor in synchronism with a voltage present on the primary reference voltage input, and wherein the output transconductance amplifier of each stage is configured to charge and/or discharge the output capacitor in synchronism with the voltage present on the primary reference voltage input.

15. A low dropout (LDO) regulator circuit having a single-stage, the LDO regulator circuit including:

(a) a primary reference voltage input;

(b) an output LDO stage coupled to the primary reference voltage input and including an associated LDO circuit including:

(1) a control input coupled to an input capacitor and to the primary reference voltage input;

(2) an output coupled to an output capacitor; and

(3) a power input coupled to one of the output of a previous dependent LDO stage or configured to be coupled to a voltage source external to the LDO regulator circuit; and

(c) an output transconductance amplifier having a first voltage input coupled to the primary reference voltage input, a second voltage input coupled to the output of the output LDO stage, and a current output coupled to the output capacitor of the output LDO stage, the output transconductance amplifier configured to charge and/or discharge the output capacitor to a desired charge level.

16. The invention of claim 15 , wherein a charge and/or discharge time for the output capacitor is essentially independent of the value of the output capacitor.

17. The invention of claim 15 , wherein the output transconductance amplifier is configured to charge and/or discharge the output capacitor in synchronism with a voltage present on the primary reference voltage input.

18. A method for providing fast power up and/or power down times in a multi-stage low dropout (LDO) regulator circuit, the method including, for each stage of the LDO regulator circuit for which fast power up and/or power down times are desired, coupling at least one transconductance amplifier to compare a primary reference voltage to one of a secondary reference voltage for the stage or an output voltage of the stage, and coupling and configuring the at least one transconductance amplifier to charge and/or discharge an associated capacitor to a desired charge level.

19. The method of claim 18 , wherein a charge and/or discharge time for each capacitor is essentially independent of the value of the capacitor.

20. The method of claim 18 , further including configuring the at least one transconductance amplifier of each stage to charge and/or discharge the associated capacitor in synchronism with the primary reference voltage.