Semiconductor substrate, semiconductor device, and method for forming semiconductor structure

1. A semiconductor substrate, comprising:

a ceramic base having a front surface and a back surface, and the front surface is a non-flat surface;

a seed layer at least partially directly disposed on the front surface of the ceramic base; and

a nucleation layer disposed on the seed layer,

wherein a material of the ceramic base and the seed layer comprises aluminum nitride.

2. The semiconductor substrate of claim 1 , wherein the seed layer is conformally disposed on the non-flat surface.

3. The semiconductor substrate of claim 2 , wherein the nucleation layer has a substantially flat upper surface.

4. The semiconductor substrate of claim 1 , wherein the seed layer has a substantially flat upper surface.

5. The semiconductor substrate of claim 4 , further comprising a dielectric filler under the seed layer, and the dielectric filler fills in pits on the front surface of the ceramic base.

6. The semiconductor substrate of claim 5 , wherein the dielectric filler comprises borophosphosilicate glass (BPSG), borosilicate glass (BSG), phosphosilicate glass (PSG), tetraethoxysilane (TEOS) oxide, silicon dioxide, silicon nitride, silicon oxynitride, or a combination thereof.

7. The semiconductor substrate of claim 1 , wherein the seed layer is monocrystalline or polycrystalline aluminum nitride.

8. The semiconductor substrate of claim 1 , wherein a material of the nucleation layer is a III-V compound of aluminum.

9. A semiconductor device, comprising:

the semiconductor substrate of claim 1 ;

a compound semiconductor layer disposed on the nucleation layer;

a gate disposed on the compound semiconductor layer; and

a source and a drain disposed on the semiconductor layer and on opposite sides of the gate.

10. The semiconductor device of claim 9 , wherein the compound semiconductor layer comprises:

a buffer layer disposed on the nucleation layer;

a channel layer disposed on the buffer layer; and

a barrier layer disposed on the channel layer.

11. A method for forming the semiconductor structure as set forth in claim 1 , comprising:

providing a ceramic base having a front surface and a back surface, and the front surface is a non-flat surface;

forming a seed layer at least partially directly on the front surface of the ceramic base; and

forming a nucleation layer on the seed layer,

wherein a material of the ceramic base and the seed layer comprises aluminum nitride.

12. The method of claim 11 , wherein the seed layer is conformally deposited on the non-flat surface.

13. The method of claim 12 , wherein the nucleation layer has a substantially flat upper surface.

14. The method of claim 11 , further comprising, before forming the seed layer,

depositing a dielectric filler, filling in pits of the front surface of the ceramic base; and

performing a planarization process, such that the dielectric filler is substantially coplanar with the ceramic base.

15. The method of claim 14 , wherein the dielectric filler is formed of borophosphosilicate glass, borosilicate glass, phosphosilicate glass, tetraethoxysilane oxide, silicon oxide, silicon nitride, silicon oxynitride, or a combination thereof.

16. The method of claim 14 , wherein the seed layer has a substantially flat upper surface.

17. The method of claim 11 , wherein the seed layer is formed by atomic layer deposition, metal organic chemical vapor deposition, or hydride vapor deposition.

18. The method of claim 11 , further comprising:

forming a compound semiconductor layer on the nucleation layer; and

forming a high electron mobility transistor device on the compound semiconductor layer.

19. The method of claim 11 , further comprising depositing a polycrystalline Si-doped material on the back surface of the ceramic base.

20. The semiconductor substrate of claim 1 , wherein there is a plurality of pits on the front surface, and the nucleation layer fills in the pits partially.